Patents by Inventor Michel Luc Cote

Michel Luc Cote has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030192013
    Abstract: One embodiment of the invention provides a system that simulates effects of a manufacturing process on an integrated circuit to enhance process latitude and/or reduce layout size. During operation, the system receives a representation of a target layout for the integrated circuit, wherein the representation defines a plurality of shapes that comprise the target layout. Next, the system simulates effects of the manufacturing process on the target layout to produce a simulated printed image for the target layout. The system then identifies problem areas in the specification that no not meet a specification. Next, the system moves corresponding shapes in the target layout to produce a new target layout for the integrated circuit, so that a simulated printed image of the new target layout meets the specification.
    Type: Application
    Filed: April 5, 2002
    Publication date: October 9, 2003
    Applicant: Numerical Technologies, Inc.
    Inventors: Michel Luc Cote, Philippe Hurat, Christophe Pierrat
  • Publication number: 20030137886
    Abstract: A full phase shifting mask (FPSM) can define substantially all of the features of an integrated circuit using pairs of shifters having opposite phase. In particular, cutting patterns for working with the polysilicon, or gate, layers and active layers of static random access memory (SRAM) cells are considered. To resolve phase conflicts between shifters, one or more cutting patterns can be selected. These cutting patterns include cuts on contact landing pads. This cut simplifies the FPSM layout while ensuring greater critical dimension control of the more important features and reducing mask misalignment sensitivity.
    Type: Application
    Filed: January 10, 2003
    Publication date: July 24, 2003
    Applicant: Numerical Technologies, Inc.
    Inventors: Christophe Pierrat, Michel Luc Cote
  • Publication number: 20020197543
    Abstract: A photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting in phase shift regions is laid out including for patterns comprising high density, small dimension features, and for “full shift” patterns. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The phase shift values assigned comprise &phgr; and &thgr;, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of &phgr; and &thgr;. In the preferred embodiment, &phgr; is equal to approximately &thgr;+180 degrees.
    Type: Application
    Filed: August 17, 2001
    Publication date: December 26, 2002
    Applicant: Numerical Technologies, Inc.
    Inventors: Christophe Pierrat, Michel Luc Cote
  • Publication number: 20020188924
    Abstract: A method for producing a computer readable definition of photolithographic mask used to define a target pattern is provided. The phase shift mask patterns include phase shift windows, and the trim mask patterns include trim shapes, which have boundaries defined by such sets of line segments. For a particular pair of phase shift windows used to define a target feature in a target pattern, each of the phase shift windows in the pair can be considered to have a boundary that includes at least one line segment that abuts the target feature. Likewise, a complementary trim shape used in definition of the target feature, for example by including a transmissive region used to clear an unwanted phase transition between the particular pair of phase shift windows, includes at least one line segment that can be considered to abut the target feature.
    Type: Application
    Filed: February 25, 2002
    Publication date: December 12, 2002
    Applicant: Numerical Technologies, Inc.
    Inventors: Christophe Pierrat, Michel Luc Cote
  • Publication number: 20020187636
    Abstract: Mask and integrated circuit fabrication approaches are described to facilitate use of so called “full phase” masks. This facilitates use of masks where substantially all of a layout is defined using phase shifting. More specifically, exposure settings including relative dosing between the phase shift mask and the trim masks are described. Additionally, single reticle approaches for accommodating both masks are considered. In one embodiment, the phase shifting mask and the trim mask are exposed using the same exposure conditions, except for relative dosing. In another embodiment, the relative dosing between the phase and trim patterns is 1.0:r, 2.0<r<4.0. These approaches facilitate better exposure profiles for the resulting ICs and can thus improve chip yield and increase throughput by reducing the need to alter settings and/or switch reticles between exposures.
    Type: Application
    Filed: October 5, 2001
    Publication date: December 12, 2002
    Applicant: Numerical Technologies, Inc.
    Inventors: Christophe Pierrat, Michel Luc Cote
  • Publication number: 20020155363
    Abstract: Phase information is incorporated into a cell-based design methodology. Standard cells have four edges: top, bottom, left, and right. The top and bottom edges have fixed phase shifters placed, e.g. 0. A given cell C will have a phase set created with two versions: 0-180 (left-right) as well as 180-0. Alternatively, the same phase set: 0-0 and 180-180 could be created for a cell. The phase sets are selected based on the ability to phase shift the features within the cell C. By creating a phase set for most of the cells of a cell library, standard cell placement and routing techniques can be used and phase can then be quickly assigned using a simple ripple technique. This ensures a phase compliant design upfront for the standard cell areas.
    Type: Application
    Filed: June 7, 2002
    Publication date: October 24, 2002
    Applicant: Numerical Technologies, Inc.
    Inventors: Michel Luc Cote, Chritophe Pierrat
  • Publication number: 20020152454
    Abstract: Definition of a phase shifting layout from an original layout can be time consuming. If the original layout is divided into useful groups, i.e. clusters that can be independently processed, then the phase shifting process can be performed more rapidly. If the shapes on the layout are enlarged, then the overlapping shapes can be grouped together to identify shapes that should be processed together. For large layouts, growing and grouping the shapes can be time consuming. Therefore, an approach that uses bins can speed up the clustering process, thereby allowing the phase shifting to be performed in parallel on multiple computers. Additional efficiencies result if identical clusters are identified and processing time saved so that repeated clusters of shapes only undergo the computationally expensive phase shifter placement and assignment process a single time.
    Type: Application
    Filed: June 7, 2002
    Publication date: October 17, 2002
    Applicant: Numerical Technologies, Inc.
    Inventors: Michel Luc Cote, Christophe Pierrat
  • Publication number: 20020129327
    Abstract: Methods and apparatuses for fully defining static random access memory (SRAM) using phase shifting layouts are described. The approach includes identifying that a layout includes SRAM cells and defining phase shifting regions in a mask description to fully define the SRAM cells. The phase conflicts between adjacent phase shifters are resolved by selecting cutting patterns designed for the SRAM shape and functional structure. Additionally, the transistor gates of the SRAM cells can be reduced in size relative to the original SRAM layout design. Thus, an SRAM cell can be lithographically printed with small, consistent critical dimensions including extremely small gate lengths resulting in higher yields and improved performance.
    Type: Application
    Filed: November 15, 2001
    Publication date: September 12, 2002
    Applicant: Numerical Technologies, Inc.
    Inventors: Christophe Pierrat, Michel Luc Cote
  • Publication number: 20020122994
    Abstract: A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.
    Type: Application
    Filed: February 28, 2002
    Publication date: September 5, 2002
    Inventors: Michel Luc Cote, Christophe Pierrat