Patents by Inventor Michel Schellekens

Michel Schellekens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8302085
    Abstract: A method (1) of developing software code for executing on a target digital processor uses a memory in which it maintains data structures having elements, each of the elements storing data which is represented by a label, and at least some links between the elements are created by the target processor as data is being processed. The method comprises the step (3) of writing the software code with data structure processing operations which comply with random structure preservation rules (2). A static analysis timing tool automatically parses (4) the code developed in step (2) to identify all operations. It determines (7) from an operation and all possible input states for that operation an average time value for execution of the operation by a target data processor, and stores (9) said average time value. It determines (8) from the operation and all possible input states all possible output states for that operation.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: October 30, 2012
    Assignee: University College Cork—National University of Ireland
    Inventor: Michel Schellekens
  • Publication number: 20110029292
    Abstract: A power estimation tool (1) receives as inputs a netlist (2) for a circuit and a library (3) of power models having values for power consumption of circuit components. It stores estimated values for components which are not randomness-preserving, and accurate values for components which are randomness-preserving. A component is randomness-preserving if input and output fixed length strings are random, in which each element in a sequence has an equal probability to occur. The values in the library (3) for randomness-preserving components are for small, low-level, components and are exact. The latter values ma for example be provided in specifications for standard low-level components such as XOR gates. The tool (1) feeds as an output average power consumption for the whole target circuit into a circuit design process (4). The input to the design process may be used in iterative cycles in which there is dynamic change of a netlist so that a target circuit can be optimized for power efficiency.
    Type: Application
    Filed: April 15, 2009
    Publication date: February 3, 2011
    Inventors: Michel Schellekens, Rachit Agarwal, Emanuel Popovici
  • Publication number: 20080295071
    Abstract: A method (1) of developing software code for executing on a target digital processor uses a memory in which it maintains data structures having elements, each of the elements storing data which is represented by a label, and at least some links between the elements are created by the target processor as data is being processed. The method comprises the step (3) of writing the software code with data structure processing operations which comply with random structure preservation rules (2). A static analysis timing tool automatically parses (4) the code developed in step (2) to identify all operations. It determines (7) from an operation and all possible input states for that operation an average time value for execution of the operation by a target data processor, and stores (9) said average time value. It determines (8) from the operation and all possible input states all possible output states for that operation.
    Type: Application
    Filed: February 16, 2006
    Publication date: November 27, 2008
    Inventor: Michel Schellekens