Abstract: A method for determining a fly height includes measuring a first differential voltage between a first head of a disk drive and a reference voltage with a first front end circuit, converting the first differential voltage to a first analog current signal with the first front end circuit, and converting the first analog current signal to a second differential voltage with a first back end circuit. The first front end circuit is coupled with the first head. The first back end circuit is coupled with the first front end circuit. The method further includes determining a first capacitance between the first head and a first disk of the disk drive based on the second differential voltage and determining the fly height between the first head and the first disk using the first capacitance.

Abstract: According to an embodiment, an envelope detector circuit for detecting an envelope of a signal from a sensor in a pre-amplifier circuit of a hard disk drive is provided. The circuit includes a half-wave rectifier, a low-pass filter, and a differential full-wave rectifier. The half-wave rectifier receives a differential voltage from the sensor indicating a fly height of the hard disk drive and generates a pair of single-ended output waveforms based on the differential voltage. Each pair of single-ended output waveforms has a positive polarity for a half-cycle it passes through. The low-pass filter includes a first and a second low-pass filter. The low-pass filter allows low-frequency signals from the pair of single-ended output waveforms to pass through while attenuating or blocking higher-frequency signals. The differential full-wave rectifier reconstructs a differential signal from the low-pass filter while removing DC rectified components.

Abstract: A system for determining a fly height includes a first head of a disk drive, a second head of the disk drive, a capacitive sensor circuit coupled to the first head and the second head, and a logic device coupled to the capacitive sensor circuit. The capacitive sensor circuit is configured to measure a first capacitance between the first head and the first disk, remove noise from the first capacitance using a second capacitance between the second head and the second disk, and based thereon determine a corrected first capacitance. The logic device is configured to determine the fly height between the first head and the first disk using the corrected first capacitance.

Abstract: A system for determining a fly height includes a first head of a disk drive, a second head of the disk drive, a capacitive sensor circuit coupled to the first head and the second head, and a logic device coupled to the capacitive sensor circuit. The capacitive sensor circuit is configured to measure a first capacitance between the first head and the first disk, remove noise from the first capacitance using a second capacitance between the second head and the second disk, and based thereon determine a corrected first capacitance. The logic device is configured to determine the fly height between the first head and the first disk using the corrected first capacitance.

Abstract: A method for determining a fly height includes measuring a first differential voltage between a first head of a disk drive and a reference voltage with a first front end circuit, converting the first differential voltage to a first analog current signal with the first front end circuit, and converting the first analog current signal to a second differential voltage with a first back end circuit. The first front end circuit is coupled with the first head. The first back end circuit is coupled with the first front end circuit. The method further includes determining a first capacitance between the first head and a first disk of the disk drive based on the second differential voltage and determining the fly height between the first head and the first disk using the first capacitance.

Abstract: A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

Abstract: A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

Abstract: A system for determining a fly height includes a first head of a disk drive, a second head of the disk drive, a capacitive sensor circuit coupled to the first head and the second head, and a logic device coupled to the capacitive sensor circuit. The capacitive sensor circuit is configured to measure a first capacitance between the first head and the first disk, remove noise from the first capacitance using a second capacitance between the second head and the second disk, and based thereon determine a corrected first capacitance. The logic device is configured to determine the fly height between the first head and the first disk using the corrected first capacitance.

Abstract: According to an embodiment, a circuit includes a core and low-frequency recovery circuits. The core circuit is configured to bias a resistive sensor used to measure a fly height of a hard disk drive. The core circuit is additionally configured to amplify a high-frequency component of a sensing signal of the resistive sensor, the sensing signal indicating the fly height. The low-frequency recovery circuit is configured to amplify the sensing signal's low-frequency component.

Abstract: A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

Abstract: A system for determining a fly height includes a first head of a disk drive, a second head of the disk drive, a capacitive sensor circuit coupled to the first head and the second head, and a logic device coupled to the capacitive sensor circuit. The capacitive sensor circuit is configured to measure a first capacitance between the first head and the first disk, remove noise from the first capacitance using a second capacitance between the second head and the second disk, and based thereon determine a corrected first capacitance. The logic device is configured to determine the fly height between the first head and the first disk using the corrected first capacitance.

Abstract: A device for the change of the driving mode of an electromagnetic load from a first operating mode with pulse width modulation to a second operating mode that is linear by means of switching circuits. During a first operating mode, each of two outputs has a voltage value ranging from a first reference voltage to a second reference voltage. The device adapted to synchronize a change command signal from a first operating mode to a second operating mode of the electromagnetic load with the signal representative of the flow of current circulating within the load at substantially its average value and adapted to generate a first command signal in response to the synchronization.

Abstract: A device for the change of the driving mode of an electromagnetic load from a first operating mode with pulse width modulation to a second operating mode that is linear by means of switching circuits. During a first operating mode, each of two outputs has a voltage value ranging from a first reference voltage to a second reference voltage. The device adapted to synchronize a change command signal from a first operating mode to a second operating mode of the electromagnetic load with the signal representative of the flow of current circulating within the load at substantially its average value and adapted to generate a first command signal in response to the synchronization.

Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.

Abstract: An output stage may include an input terminal receiving an input signal, an output terminal coupled to an external load, and a pre-buffer coupled to the input terminal and including an enable terminal receiving a general enable signal and a first output terminal for supplying a first control signal. The output stage may also include an output buffer including a first final transistor inserted between the supply terminal and the output terminal, and a control terminal coupled to the first output terminal of the pre-buffer for receiving the first control signal, and a first tracking circuit between the supply terminal and the first output terminal of the pre-buffer. The first tracking circuit may include a first capacitor between the supply terminal and a first intermediate node coupled to the first output terminal of the pre-buffer by a switch activated by a first activation signal during a transient of the first final transistor thereby reconstructing a noise of the first reference voltage.

Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.

Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.

Abstract: An output stage may include an input terminal receiving an input signal, an output terminal coupled to an external load, and a pre-buffer coupled to the input terminal and including an enable terminal receiving a general enable signal and a first output terminal for supplying a first control signal. The output stage may also include an output buffer including a first final transistor inserted between the supply terminal and the output terminal, and a control terminal coupled to the first output terminal of the pre-buffer for receiving the first control signal, and a first tracking circuit between the supply terminal and the first output terminal of the pre-buffer. The first tracking circuit may include a first capacitor between the supply terminal and a first intermediate node coupled to the first output terminal of the pre-buffer by a switch activated by a first activation signal during a transient of the first final transistor thereby reconstructing a noise of the first reference voltage.

Abstract: An output buffer includes at least a first and a second stage, wherein each stage is formed by respective first transistors and second transistors coupled in series with each other between a first and a second voltage reference. The coupled first and second transistors have a common conduction terminal connected to an output terminal of the output buffer. An input terminal of the buffer is connected to control terminals of the transistors of the first stage through a first open loop driving circuit. A second feedback driving circuit is connected between the input terminal and the control terminals of the transistors of the second stage. The second feedback driving circuit includes a current detector operating to detect a maximum in the value of the current drawn by and supplied to the output buffer. A comparison block, having a threshold value, detects current in excess of the threshold value and processes information coming from the current detector to regulate an output impedance value of the output buffer.