Abstract: A method of fabricating a wafer-size photovoltaic cell module includes defining an integrated cellular structure of a light converting monolateral or bilateral junction diode in an epitaxially grown detachable layer including a first deposited metal current collecting terminal of the diode. The method also includes laminating onto the surface of the processed epitaxially grown detachable layer a film of an optical grade plastic material resistant to hydrofluoric acid solutions. The method further includes immersing the wafer in a hydrofluoric acid solution causing detachment of the epitaxially grown silicon layer laminated with the film, and polishing the surface of separation of the detached epitaxially grown layer and forming a second metal current collecting terminal of the diode by masked deposition of a metal at a temperature tolerable by the film.

Abstract: A biological molecule detection device that includes a detection array, arranged on a body and having one or more probes for detecting corresponding electrically charged molecules, wherein a time varying electric field generating circuit is provided for generating at least one time varying electric field around the detection array within the detection region. The time varying electric field moves the electrical charged molecules repeatedly back and forth over the probes, thus providing increased opportunities for interaction and speeding the detection process.

Abstract: A microfuel cell includes a substrate and a plurality of spaced-apart PEM dividers extending outwardly to define anodic and cathodic microfluidic channels. An anodic catalyst/electrode lines at least a portion of the anodic microfluidic channels, and a cathodic catalyst/electrode lines at least a portion of the cathodic microfluidic channels. Each anodic and cathodic catalyst/electrode may extend beneath an adjacent portion of a PEM divider in some embodiments. Alternately, the microfuel cell may include a plurality of stacked substrates, in which a first substrate has first microfluidic fuel cell reactant channels. A PEM layer may be adjacent the first surface of the first substrate, an anodic catalyst/electrode layer may be adjacent one side of the PEM layer, and a cathodic catalyst/electrode layer may be adjacent an opposite side of the PEM layer. An adhesive layer may secure the first substrate to an adjacent substrate defining at least a second microfluidic fuel cell reactant channel.

Abstract: An integrated device for nucleic acid analysis having a support and a first tank for introducing a raw biological specimen includes at least one pre-treatment channel, a buried amplification chamber, and a detection chamber carried by the support and in fluid connection with one another and with the tank. The device can be used for all types of biological analyses.

Abstract: A microfluidic device includes an inlet reservoir, for receiving electrically charged substances dispersed in a fluid medium, a microfluidic circuit in fluidic connection with the inlet reservoir, and an electric transport device for moving the electrically charged substances along the microfluidic circuit. The electric transport device comprises a number of conductive regions arranged along the microfluidic circuit and separated by regions of opposite type, said regions of conductivity electrically connected to a voltage source for providing pulsed voltage that carries charged substances along the microfluidic circuit.

Abstract: A microfluidic device includes a microfluidic circuit, having an axis, and an electric field generator, arranged to establish an electric field (E) within at least a section of the microfluidic circuit, the electric field (E) being oriented transversally to the axis. The electric field is used to locally concentrate charged molecules, thus increasing the reaction rate.

Abstract: A microfuel cell includes a substrate and a plurality of spaced-apart PEM dividers extending outwardly to define anodic and cathodic microfluidic channels. An anodic catalyst/electrode lines at least a portion of the anodic microfluidic channels, and a cathodic catalyst/electrode lines at least a portion of the cathodic microfluidic channels. Each anodic and cathodic catalyst/electrode may extend beneath an adjacent portion of a PEM divider in some embodiments. Alternately, the microfuel cell may include a plurality of stacked substrates, in which a first substrate has first microfluidic fuel cell reactant channels. A PEM layer may be adjacent the first surface of the first substrate, an anodic catalyst/electrode layer may be adjacent one side of the PEM layer, and a cathodic catalyst/electrode layer may be adjacent an opposite side of the PEM layer. An adhesive layer may secure the first substrate to an adjacent substrate defining at least a second microfluidic fuel cell reactant channel.

Abstract: An integrated device for nucleic acid analysis having a support (10) and a first tank (8) for introducing a raw biological specimen includes at least one pre-treatment channel (17), a buried amplification chamber (21), and a detection chamber (24) carried by the support (10) and in fluid connection with one another and with the tank (8). The device can be used for all types of biological analyses.

Abstract: An optical switch having an insulator under a heater element is disclosed. The insulator reduces the heat loss thereby making the switch more efficient. The insulator is fabricated embedded in the underlying substrate on which the heater and the optical intersection are fabricated. A method of fabricating the optical switch having an insulator is disclosed. A trench is etched on the substrate and filled with oxide or other suitable insulating material. Then, the heater and the optical intersection are fabricated above the insulator.

Abstract: An optical switch having an insulator under a heater element is disclosed. The insulator reduces the heat loss thereby making the switch more efficient. The insulator is fabricated embedded in the underlying substrate on which the heater and the optical intersection are fabricated. A method of fabricating the optical switch having an insulator is disclosed. A trench is etched on the substrate and filled with oxide or other suitable insulating material. Then, the heater and the optical intersection are fabricated above the insulator.

Abstract: An integrated circuit includes junction insulation on a substrate of semiconductor material. The integrated circuit comprises active regions of a first type of conductivity, and insulation regions which separate the junction-forming active regions from one another and from the substrate. The integrated circuit also includes electrical contacts for reverse-biasing the junctions. In order to obtain highly efficient insulation, at least one of the active regions is separated from the active regions adjacent to it and from the substrate by insulation regions which form an inner insulation shell, including regions of a second conductivity type. These regions contain the active region. An outer insulation shell includes regions of the first conductivity type which contain the inner insulation shell.

Abstract: In a junction isolated integrated circuit including power DMOS transistors formed in respective well regions or in an isolated epitaxial region on a substrate of opposite type of conductivity, circuits are formed in a distinct isolated region sensitive to oversupply and/or belowground effects. These effects are caused by respective power DMOS transistors coupled to the supply rail or ground. These effects are alternatively controllable by specifically shaped layout arrangements, and may be effectively protected from both effects. This is achieved by interposing between the region of sensitive circuits and the region containing the power DMOS transistors for which the alternatively implementable circuital arrangements are not formed, the region containing the power DMOS transistors coupled to the supply rail or to a ground rail for which the alternatively implementable arrangements are formed.

Abstract: A process for forming insulating structures for integrated circuits that includes depositing a silicon oxide layer; shaping the silicon oxide layer to form first delimiting walls of the insulating regions substantially perpendicular to the substrate; and shaping the silicon oxide layer to form second delimiting walls inclined with respect to the substrate. The first walls have an angle of between approximately 70° and 110° with respect to the surface of the substrate; the second walls have an angle of between approximately 30° and 70° with respect to the surface of the substrate 11. The first delimiting walls are formed using a first mask and etching anisotropically first portions of the oxide layer; the second delimiting walls are formed using a second mask and carrying out a damage implantation for damaging second portions of the oxide layer and subsequently wet etching the damaged portions.

Abstract: A high-voltage lateral MOSFET transistor structure constituted by various interdigitated modular elements formed on a layer of monocrystaline silicon is described together with a process for its fabrication.To save area of silicon and to reduce the specific resistivity RDS on doping drain regions are formed by implanting doping material in the silicon through apertures in the field oxide obtained with a selective anisotropic etching by utilizing as a mask the strips of polycrystaline silicon which serve as gate electrodes and field electrodes.

Abstract: The DMOS transistor includes an n drain region, a p body region which forms, with the drain region, a junction having at least one edge portion with a small radius of curvature, an n+ source region which delimits a channel in the body region, p+ body contact regions, a gate electrode, a source and body electrode, and a drain electrode. To prevent the "snap-back" phenomenon when the junction is reverse biased with the source, body and gate electrodes short-circuited, a p+ region is associated with each of the edge portions having a small radius of curvature and is arranged so as to be closer to the associated edge portion than any part of the source region.

Abstract: A process for the manufacturing of an integrated circuit having DMOS-technology power devices and non-volatile memory cells provides for forming respective laterally displaced isolated semiconductor regions, electrically insulated from each other and from a common semiconductor substrate, inside which the devices will be formed; forming conductive gate regions for the DMOS-technology power devices and for the memory cells over the respective isolated semiconductor regions. Inside the isolated semiconductor regions for the DMOS-technology power devices, channel regions extending under the insulated gate regions are formed. The channel regions are formed by an implantation of a dopant along directions tilted of a prescribed angle with respect to a direction orthogonal to a top surface of the integrated circuit, in a dose and with an energy such that the channel regions are formed directly after the implantation of the dopant without performing a thermal diffusion at a high temperature of the dopant.

Abstract: A process for doping a P-type substrate (50) by forming a layer (52) of silicon nitride, implanting N-type impurities through this layer (FIG. 7), forming a resist mask (54) which leaves at least one area of the substrate (FIG. 8) containing a part of the nitride layer exposed, implanting N-type impurities first with an insufficient energy and then with a sufficient energy to traverse the nitride layer, subjecting (FIG. 9) the substrate to a high temperature treatment in an oxidizing environment to form silicon dioxide pads (55) on the areas of the substrate not covered by the nitride layer, removing the nitride layer and performing an implantation of P-type impurities into the areas delimited by the pads. The process then continues with the removal of the pads and, in the conventional manner, with the formation of an epitaxial layer and selective doping of this to form P-type and N-type regions in it.

Abstract: A method is disclosed for forming a first region with conductivity of a first type and second, buried region with conductivity of a second type which forms a junction with the first region. By first and second doping steps, impurities of a first and a second type are successively introduced into a silicon chip. A high-temperature treatment causes the impurities thus introduced to diffuse and form said first and second regions. In order to provide a buried region whose concentration and/or depth are little dependent on process parameters, the second doping step comprises a first sub-step of low dosage and high energy implantation, and a second sub-step of low dosage and high energy implantation. The dosages and energies are such that they will not compensate or reverse the type of conductivity of the first region, and such that the concentration in the second region will be substantially due to the second implantation step only.