Patents by Inventor Michele VIMERCATI

Michele VIMERCATI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250083951
    Abstract: A process for manufacturing a microelectromechanical device includes: on a body containing semiconductor material, forming a sacrificial layer of dielectric material having a first surface, opposite to the body; conferring a sacrificial surface roughness to the first surface of the sacrificial layer; on the first surface of the sacrificial layer, forming a structural layer of semiconductor material having a second surface in contact with the first surface of the sacrificial layer. Conferring sacrificial surface roughness to the first surface of the sacrificial layer includes: on the sacrificial layer, forming a transfer layer of semiconductor material with intrinsic porosity; and partially removing the sacrificial layer through the transfer layer.
    Type: Application
    Filed: August 16, 2024
    Publication date: March 13, 2025
    Applicant: STMicroelectronics International N.V.
    Inventors: Andrea NOMELLINI, Ilaria GELMI, Federica CAPRA, Michele VIMERCATI, Luca LAMAGNA
  • Patent number: 11440794
    Abstract: A bottom semiconductor region is formed to include a main sub-region, extending through a bottom dielectric region that coats a semiconductor wafer, and a secondary sub-region which coats the bottom dielectric region and surrounds the main sub-region. First and second top cavities are formed through the wafer, delimiting a fixed body and a patterned structure that includes a central portion which contacts the main sub-region, and deformable portions in contact with the bottom dielectric region. A bottom cavity is formed through the bottom semiconductor region, as far as the bottom dielectric region, the bottom cavity laterally delimiting a stiffening region including the main sub-region and leaving exposed parts of the bottom dielectric region that contact the deformable portions and parts of the bottom dielectric region that delimit the first and second top cavities. The parts left exposed by the bottom cavity are selectively removed.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: September 13, 2022
    Assignee: STMicroelectronics S.r.l.
    Inventors: Sonia Costantini, Davide Assanelli, Aldo Luigi Bortolotti, Michele Vimercati, Igor Varisco
  • Publication number: 20200079645
    Abstract: A bottom semiconductor region is formed to include a main sub-region, extending through a bottom dielectric region that coats a semiconductor wafer, and a secondary sub-region which coats the bottom dielectric region and surrounds the main sub-region. First and second top cavities are formed through the wafer, delimiting a fixed body and a patterned structure that includes a central portion which contacts the main sub-region, and deformable portions in contact with the bottom dielectric region. A bottom cavity is formed through the bottom semiconductor region, as far as the bottom dielectric region, the bottom cavity laterally delimiting a stiffening region including the main sub-region and leaving exposed parts of the bottom dielectric region that contact the deformable portions and parts of the bottom dielectric region that delimit the first and second top cavities. The parts left exposed by the bottom cavity are selectively removed.
    Type: Application
    Filed: September 10, 2019
    Publication date: March 12, 2020
    Applicant: STMicroelectronics S.r.l.
    Inventors: Sonia COSTANTINI, Davide ASSANELLI, Aldo Luigi BORTOLOTTI, Michele VIMERCATI, Igor VARISCO