Patents by Inventor Michelle Marie Eastlack

Michelle Marie Eastlack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Pre-metal deposition clean process
    Patent number: 9129796
    Abstract: A process of forming an integrated circuit including an MOS transistor, in which a pre-metal deposition cleanup prior to depositing metal for silicide formation includes an HF etch, a first SC1 etch, a piranha etch and a second SC1 etch, so that a native oxide on the source/drain regions is less the 2 nanometers thick before deposition of the silicide metal. A process of forming a metal silicide layer on an integrated circuit containing an MOS transistor, in which a pre-metal deposition cleanup prior to depositing metal for silicide formation includes an HF etch, a first SC1 etch, a piranha etch and a second SC1 etch, so that a native oxide on the source/drain regions and the MOS gate is less the 2 nanometers thick before deposition of the silicide metal.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: September 8, 2015
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Scott Cuong Nguyen, Phuong-Lan Thi Tran, Michelle Marie Eastlack
  • PRE-METAL DEPOSITION CLEAN PROCESS
    Publication number: 20120058614
    Abstract: A process of forming an integrated circuit including an MOS transistor, in which a pre-metal deposition cleanup prior to depositing metal for silicide formation includes an HF etch, a first SC1 etch, a piranha etch and a second SC1 etch, so that a native oxide on the source/drain regions is less the 2 nanometers thick before deposition of the silicide metal. A process of forming a metal silicide layer on an integrated circuit containing an MOS transistor, in which a pre-metal deposition cleanup prior to depositing metal for silicide formation includes an HF etch, a first SC1 etch, a piranha etch and a second SC1 etch, so that a native oxide on the source/drain regions and the MOS gate is less the 2 nanometers thick before deposition of the silicide metal.
    Type: Application
    Filed: August 16, 2011
    Publication date: March 8, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Scott Cuong Nguyen, Phuong-Lan Thi Tran, Michelle Marie Eastlack