Patents by Inventor Michelle Rene Dickinson

Michelle Rene Dickinson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
    Patent number: 10381260
    Abstract: A method of preparing a single crystal semiconductor handle wafer in the manufacture of a semiconductor-on-insulator device is provided. The single crystal semiconductor handle wafer is prepared to comprise a charge trapping layer, which is oxidized. The buried oxide layer in the resulting semiconductor-on-insulator device comprises an oxidized portion of the charge trapping layer and an oxidized portion of the single crystal semiconductor device layer.
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: August 13, 2019
    Assignee: GlobalWafers Co., Inc.
    Inventors: Igor Peidous, Jeffrey L. Libbert, Srikanth Kommu, Andrew M. Jones, Samuel Christopher Pratt, Horacio Josue Mendez, Leslie George Stanton, Michelle Rene Dickinson
  • Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
    Patent number: 10381261
    Abstract: A method of preparing a single crystal semiconductor handle wafer in the manufacture of a semiconductor-on-insulator device is provided. The single crystal semiconductor handle wafer is prepared to comprise a charge trapping layer, which is oxidized. The buried oxide layer in the resulting semiconductor-on-insulator device comprises an oxidized portion of the charge trapping layer and an oxidized portion of the single crystal semiconductor device layer.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: August 13, 2019
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Peidous, Jeffrey L. Libbert, Srikanth Kommu, Andrew Marquis Jones, Samuel Christopher Pratt, Horacio Josue Mendez, Leslie George Stanton, Michelle Rene Dickinson
  • METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFERS WITH CHARGE TRAPPING LAYERS
    Publication number: 20180277421
    Abstract: A method of preparing a single crystal semiconductor handle wafer in the manufacture of a semiconductor-on-insulator device is provided. The single crystal semiconductor handle wafer is prepared to comprise a charge trapping layer, which is oxidized. The buried oxide layer in the resulting semiconductor-on-insulator device comprises an oxidized portion of the charge trapping layer and an oxidized portion of the single crystal semiconductor device layer.
    Type: Application
    Filed: May 21, 2018
    Publication date: September 27, 2018
    Inventors: Igor Peidous, Jeffrey L. Libbert, Srikanth Kommu, Andrew Marquis Jones, Samuel Christopher Pratt, Horacio Josue Mendez, Leslie George Stanton, Michelle Rene Dickinson
  • A METHOD OF MANUFACTURING HIGH RESISTIVITY SEMICONDUCTOR-ON-INSULATOR WAFERS WITH CHARGE TRAPPING LAYERS
    Publication number: 20170338143
    Abstract: A method of preparing a single crystal semiconductor handle wafer in the manufacture of a semiconductor-on-insulator device is provided. The single crystal semiconductor handle wafer is prepared to comprise a charge trapping layer, which is oxidized. The buried oxide layer in the resulting semiconductor-on-insulator device comprises an oxidized portion of the charge trapping layer and an oxidized portion of the single crystal semiconductor device layer.
    Type: Application
    Filed: November 13, 2015
    Publication date: November 23, 2017
    Applicant: SunEdison Semiconductor Limited (UEN201334 164)
    Inventors: Igor Peidous, Jeffrey L. Libbert, Srikanth Kommu, Andrew M. Jones, Samuel Christopher Pratt, Horacio Josue Mendez, Leslie George Stanton, Michelle Rene Dickinson