Patents by Inventor Michihisa Maeda

Michihisa Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200041543
    Abstract: A probe structure is provided with: a holding plate which has a first surface and a second surface in which at least the first surface is insulated; a plurality of electrodes which are formed on the first surface of the holding plate in such a state that the plurality of electrodes is separated from each other; and carbon nanotube structures which are erected on the electrodes 3. The holding plate is provided with through holes which correspond to the electrodes, respectively.
    Type: Application
    Filed: March 14, 2018
    Publication date: February 6, 2020
    Applicant: Nidec-Read Corporation
    Inventors: Michihisa MAEDA, Kiyoshi NUMATA, Hidekazu YAMAZAKI, Makoto FUJINO
  • Publication number: 20040152238
    Abstract: A flip chip method of joining a chip and a substrate is described. A thermo-compression bonder is utilized to align the chip and substrate and apply a contact force to hold solder bumps on the substrate against metal bumps on the chip. The chip is rapidly heated from its non-native side by a pulse heater in the head of the bonder until the re-flow temperature of the solder bumps is reached. Proximate with reaching the re-flow temperature at the solder bumps, the contact force is released. The solder is held above its re-flow temperature for several seconds to facilitate wetting of the substrate's metal protrusions and joining. A no-clean flux that has a volatilization temperature below the melting point of the solder bumps is utilized to minimize or eliminate the need for a post interconnection de-flux operation.
    Type: Application
    Filed: January 21, 2004
    Publication date: August 5, 2004
    Inventors: Michihisa Maeda, Kenji Takahashi
  • Patent number: 6713318
    Abstract: A flip chip method of joining a chip and a substrate is described. A thermo-compression bonder is utilized to align the chip and substrate and apply a contact force to hold solder bumps on the substrate against metal bumps on the chip. The chip is rapidly heated from its non-native side by a pulse heater in the head of the bonder until the re-flow temperature of the solder bumps is reached. Proximate with reaching the re-flow temperature at the solder bumps, the contact force is released. The solder is held above its re-flow temperature for several seconds to facilitate wetting of the substrate's metal protrusions and joining. A no-clean flux that has a volatilization temperature below the melting point of the solder bumps is utilized to minimize or eliminate the need for a post interconnection de-flux operation.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: March 30, 2004
    Assignee: Intel Corporation
    Inventors: Michihisa Maeda, Kenji Takahashi
  • Publication number: 20020142517
    Abstract: A flip chip method of joining a chip and a substrate is described. A thermo-compression bonder is utilized to align the chip and substrate and apply a contact force to hold solder bumps on the substrate against metal bumps on the chip. The chip is rapidly heated from its non-native side by a pulse heater in the head of the bonder until the re-flow temperature of the solder bumps is reached. Proximate with reaching the re-flow temperature at the solder bumps, the contact force is released. The solder is held above its re-flow temperature for several seconds to facilitate wetting of the substrate's metal protrusions and joining. A no-clean flux that has a volatilization temperature below the melting point of the solder bumps is utilized to minimize or eliminate the need for a post interconnection de-flux operation.
    Type: Application
    Filed: March 28, 2001
    Publication date: October 3, 2002
    Inventors: Michihisa Maeda, Kenji Takahashi
  • Patent number: 5298399
    Abstract: An isolated structural Bacillus sp. TB-90 (FERM BP-795) urease gene, which comprises base sequences encoding the amino acid sequences of three subunits of urease. A recombinant DNA comprising Bacillus sp. TB-90 (FERM BP-795) urease gene capable of replicating in Escherichia coli. A process for producing urease, which comprises cultivating Escherichia coli carrying a recombinant DNA comprising Bacillus sp.
    Type: Grant
    Filed: July 18, 1991
    Date of Patent: March 29, 1994
    Assignee: Sapporo Breweries Limited
    Inventors: Takeshi Uozumi, Haruhiko Masaki, Makoto Hidaka, Akira Nakamura, Michihisa Maeda, Yasuo Yoneta
  • Patent number: 5179318
    Abstract: A cathode-ray tube having a face plate which includes a phosphor layer provided at the inner surface side of a glass plate and an optical interference filter provided between the phosphor layer and the inner surface of the plate. The optical interference filter is constituted by high- and low-refractive index layers. The outermost layer of the optical interference filter in contact with the phosphor layer is an Al.sub.2 O.sub.3 layer or a ZrO.sub.2 layer having a physical thickness of 10 nm or more. The high-refractive index layer of the optical interference filter preferably consists of TiO.sub.2, and its low-refractive index layer preferably consists of Al.sub.2 O.sub.3.
    Type: Grant
    Filed: June 29, 1990
    Date of Patent: January 12, 1993
    Assignees: Nippon Sheet Glass Co., Ltd., Hitachi, Ltd.
    Inventors: Michihisa Maeda, Yoshiyuki Hanada, Hidemi Nakai, Yasukazu Morita, Yasuhiko Uehara