Abstract: A differential amplifier includes first and second current paths, each connected between first and second power supplies (PS) and respectively outputting first and second differential output signals. The first current path includes: first transistor, selectively interconnected between the first PS and a first output terminal, its gate receiving one differential input signal; second transistor, connected between the second PS and the first output terminal, its gate receiving the other differential input signal; and first switch circuit. The second current path includes: third transistor, selectively interconnected between the second PS and a second output terminal, its gate receiving one differential input signal; fourth transistor, connected between the first PS and the second output terminal, its gate receiving the other differential input signal; and second switch circuit. One of the first and second switch circuits is connected to the first PS and the other is connected to the second PS.

Abstract: A differential amplifier includes first and second current paths, each connected between first and second power supplies (PS) and respectively outputting first and second differential output signals. The first current path includes: first transistor, selectively interconnected between the first PS and a first output terminal, its gate receiving one differential input signal; second transistor, connected between the second PS and the first output terminal, its gate receiving the other differential input signal; and first switch circuit. The second current path includes: third transistor, selectively interconnected between the second PS and a second output terminal, its gate receiving one differential input signal; fourth transistor, connected between the first PS and the second output terminal, its gate receiving the other differential input signal; and second switch circuit. One of the first and second switch circuits is connected to the first PS and the other is connected to the second PS.

Abstract: A differential amplifier including: 1st transistor that is connected between 1st power-supply terminal and 1st output terminal, and has a control terminal receiving one of the differential input signals; 2nd transistor that is connected between 2nd power-supply terminal and 1st output terminal, and has a control terminal receiving the other of the differential input signals; 1st switch that is connected between 1st power-supply terminal and 1st transistor; 3rd transistor that is connected between 2nd power-supply terminal and 2nd output terminal, and has a control terminal receiving one of the differential input signals; 4th transistor that is connected between 1st power-supply terminal and 2nd output terminal, and has a control terminal receiving the other of the differential input signals; 2nd switch that is connected between 2nd power-supply terminal and 3rd transistor. Drive state of 1st and 2nd switches are controlled by a control signal.

Abstract: A differential amplifier including: 1st transistor that is connected between 1st power-supply terminal and 1st output terminal, and has a control terminal receiving one of the differential input signals; 2nd transistor that is connected between 2nd power-supply terminal and 1st output terminal, and has a control terminal receiving the other of the differential input signals; 1st switch that is connected between 1st power-supply terminal and 1st transistor; 3rd transistor that is connected between 2nd power-supply terminal and 2nd output terminal, and has a control terminal is input to one of the differential input signals; 4th transistor that is connected between 1st power-supply terminal and 2nd output terminal, and has a control terminal receiving the other of the differential input signals; 2nd switch that is connected between 2nd power-supply terminal and 3rd transistor. Drive state of 1st and 2nd switches are controlled by a control signal.

Abstract: A low-voltage differential signaling (LVDS) driver circuit for providing logic output and high impedance output includes a current source, an output switch circuit setting an output state, and a bypass circuit bypassing a current from the current source during high impedance output. A termination voltage is supplied to the intermediate node of the bypass circuit.

Abstract: A low-voltage differential signaling (LVDS) driver circuit for providing logic output and high impedance output includes a current source, an output switch circuit setting an output state, and a bypass circuit bypassing a current from the current source during high impedance output. A termination voltage is supplied to the intermediate node of the bypass circuit.

Abstract: A digital phase locked loop keeps an output signal exactly in phase and frequency with a reference signal. An oscillator has a plurality of delay elements which are connected to one another in a loop to produce the output signal. Each of the delay elements has a delay which is controlled by one of digital control signal sets supplied from a controller. A total delay of the delay elements decides a frequency of the output signal. A phase comparator is connected to the oscillator to compare the output signal with the reference signal in phase and frequency to produce an error signal. A controller is connected between the phase comparator and the oscillator to produce the digital control signal sets in response to the error signal.

Abstract: A frequency measurement test circuit includes a frequency divider, and a detection circuit. The frequency divider frequency-divides an input to be measured. The detection circuit outputs a signal of level set on the basis of a relationship in magnitude between the frequency of the signal frequency-divided by the frequency divider and that of a reference clock signal.

Abstract: A PLL circuit detects oscillation halt of a voltage control oscillator, generates an oscillation control signal for automatically oscillating the voltage control oscillator based upon the detected signal, and automatically restores the voltage control oscillator to a normal oscillation state by the use of the generated signal. The voltage control oscillator is structured by a ring oscillator in which a plurality of differential amplifiers are connected in a ring form. A plurality of oscillation control means are arranged for the respective inputs of the differential amplifiers so as to set the ring oscillator into an oscillationable state when the voltage control oscillator halts. The oscillation control means is controlled by the oscillating control signal.