Abstract: A semiconductor device in certain embodiments includes an insulating layer provided above the upper surface of a semiconductor substrate, and a capacitive element section and a resistance element section formed above the insulating layer. In the capacitive element section, a gate electrode serving as an opposite electrode for the capacitive element is formed above the insulating layer. The gate electrode is covered with a dielectric layer comprising silicon oxide, silicon nitride or tantalum oxide, and an electrode for the capacitive element comprising MoSix is provided above the dielectric layer. The resistance element section has a resistance element comprising MoSix formed simultaneously with the electrode for the capacitive element in the same process.

Abstract: A semiconductor device in certain embodiments includes an insulating layer provided above the upper surface of a semiconductor substrate, and a capacitive element section and a resistance element section formed above the insulating layer. In the capacitive element section, a gate electrode serving as an opposite electrode for the capacitive element is formed above the insulating layer. The gate electrode is covered with a dielectric layer comprising silicon oxide, silicon nitride or tantalum oxide, and an electrode for the capacitive element comprising MoSix is provided above the dielectric layer. The resistance element section has a resistance element comprising MoSix formed simultaneously with the electrode for the capacitive element in the same process.

Abstract: A semiconductor device in certain embodiments includes an insulating layer provided above the upper surface of a semiconductor substrate, and a capacitive element section and a resistance element section formed above the insulating layer. In the capacitive element section, a gate electrode serving as an opposite electrode for the capacitive element is formed above the insulating layer. The gate electrode is covered with a dielectric layer comprising silicon oxide, silicon nitride or tantalum oxide, and an electrode for the capacitive element comprising MoSix is provided above the dielectric layer. The resistance element section has a resistance element comprising MoSix formed simultaneously with the electrode for the capacitive element in the same process.

Abstract: A semiconductor device may have an insulating layer comprising a silicon oxide film or the like formed so as to cover an entire upper surface of a semiconductor substrate. A resistance element comprising MoSix is formed on the insulating layer. An insulating film is provided on the surface of the semiconductor substrate above the insulating layer. A through-hole is provided in the insulating film located above the resistance element, and an electrode provided above the insulating film is electrically connected to the resistance element through this through-hole.

Abstract: A semiconductor device in certain embodiments includes an insulating layer provided above the upper surface of a semiconductor substrate, and a capacitive element section and a resistance element section formed above the insulating layer. In the capacitive element section, a gate electrode serving as an opposite electrode for the capacitive element is formed above the insulating layer. The gate electrode is covered with a dielectric layer comprising silicon oxide, silicon nitride or tantalum oxide, and an electrode for the capacitive element comprising MoSix is provided above the dielectric layer. The resistance element section has a resistance element comprising MoSix formed simultaneously with the electrode for the capacitive element in the same process.

Abstract: A copper alloy wire has a composition composed of no less than 0.01% by weight of Ag and balance Cu and unavoidable impurities. The copper alloy wire has been prepared by drawing a wire stock having the composition at a reduction ratio of no lower than 40% and subjecting the wire stock to heat treatment for half annealing to have a tensile strength of no lower than 27 kg.multidot.f/mm.sup.2 and an elongateion of 5%. An insulated elecric wire includes the copper alloy wire as a conductor and an insulation layer covering the wire. Also, a multiple core parallel bonded wire includes two or more such insulated electric wires bonded parallel to each other.

Abstract: A stranded insulated wire and a method of producing the same. The stranded insulated wire is produced by applying a coating material containing polyvinyl butyral and a stabilized polyisocyanate to an enameled strands assembly and then by baking the assembly. The coating material contains about 1 to about 1000 parts by weight of the stabilized polyisocyanate per 100 parts by weight of the polyvinyl butyral.