Patents by Inventor Michio Kusayanagi
Michio Kusayanagi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7724751Abstract: A first communication device receives an ATM cell bound for a second ATM device from a first ATM device via an ATM interface, and then the first communication device sends a data frame including the ATM cell to the second ATM device via wide area Ethernet. In addition, the first communication device sends a synchronization frame to the second ATM device via the wide area Ethernet continuously at a predetermined time interval in accordance with a clock frequency of the first ATM device. A second communication device receives the synchronization frame and measures a clock frequency of the first ATM device in accordance with a time interval of receiving the synchronization frame so as to reproduce a clock having the same frequency as the measured clock frequency. After that, the second communication device sends the clock to the second ATM device via an ATM interface.Type: GrantFiled: April 25, 2005Date of Patent: May 25, 2010Assignee: Fujitsu LimitedInventors: Norihisa Uchimoto, Koji Tatsumi, Kazuhisa Shimazaki, Koichiro Yamada, Satoshi Namura, Akio Morimoto, Michio Kusayanagi
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Publication number: 20090252169Abstract: A first communication device receives an ATM cell bound for a second ATM device from a first ATM device via an ATM interface, and then the first communication device sends a data frame including the ATM cell to the second ATM device via wide area Ethernet. In addition, the first communication device sends a synchronization frame to the second ATM device via the wide area Ethernet continuously at a predetermined time interval in accordance with a clock frequency of the first ATM device. A second communication device receives the synchronization frame and measures a clock frequency of the first ATM device in accordance with a time interval of receiving the synchronization frame so as to reproduce a clock having the same frequency as the measured clock frequency. After that, the second communication device sends the clock to the second ATM device via an ATM interface.Type: ApplicationFiled: June 11, 2009Publication date: October 8, 2009Applicant: Fujitsu LimitedInventors: Norihisa UCHIMOTO, Koji Tatsumi, Kazuhisa Shimazaki, Koichiro Yamada, Satoshi Namura, Akio Morimoto, Michio Kusayanagi
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Patent number: 7599376Abstract: A converter for connecting its ATM network with other ATM networks through a LAN, which is provided with an address translation table storing external VPIs, internal VPIs uniquely assigned to the LAN, and opposing MAC addresses for opposing converters in correspondence and a processing unit for performing control for transmitting, to the LAN, frames changed from the external VPI/VCIs of headers of cells from its ATM network to the internal VPI/VCIs by referring to the address translation table and having opposing MAC addresses corresponding to the internal VPI/VCIs attached, removing the opposing MAC addresses of frames received from the LAN by referring to the address translation table, and transmitting cells changed from internal VPI/VCIs to external VPI/VCIs to its ATM network.Type: GrantFiled: June 9, 2005Date of Patent: October 6, 2009Assignee: Fujitsu LimitedInventors: Shinya Nakagaki, Toshikazu Inoue, Kazuya Kumazaki, Mineharu Hattori, Tetsuji Ichikawa, Nobuo Iguchi, Akio Morimoto, Michio Kusayanagi
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Publication number: 20090041031Abstract: A converter for connecting its ATM network with other ATM networks through a LAN, which is provided with an address translation table storing external VPIs, internal VPIs uniquely assigned to the LAN, and opposing MAC addresses for opposing converters in correspondence and a processing unit for performing control for transmitting, to the LAN, frames changed from the external VPI/VCIs of headers of cells from its ATM network to the internal VPI/VCIs by referring to the address translation table and having opposing MAC addresses corresponding to the internal VPI/VCIs attached, removing the opposing MAC addresses of frames received from the LAN by referring to the address translation table, and transmitting cells changed from internal VPI/VCIs to external VPI/VCIs to its ATM network.Type: ApplicationFiled: October 7, 2008Publication date: February 12, 2009Applicant: FUJITSU LIMITEDInventors: Shinya Nakagaki, Toshikazu Inoue, Kazuya Kumazaki, Mineharu Hattori, Tetsuji Ichikawa, Nobuo Iguchi, Akio Morimoto, Michio Kusayanagi
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Patent number: 7424005Abstract: To make an efficient network operation possible in which a user-side device connected by a permanent virtual connection path is selectively connected to one among multiple specified connection destinations, and multiple layer 2 links are multiplexed to one path, a layer 2 link handler is connected to the user-side device by a permanent virtual connection path PVC via the ATM switch the layer 2 link handler has a path specifying units and is connected to multiple specified connection destinations by permanent virtual connection paths or switched virtual connection path via ATM switch that specifies one path of the connection request destinations from layer 2 link information emitted from the user-side device at the time of the layer 2 link connection request, and sets to the path of that specified connection destination a layer 2 link of the permanent virtual connection path PVC of the user-side device. Labels are assigned to layer 2 links, and layer 2 links may be multiplexed.Type: GrantFiled: August 30, 2000Date of Patent: September 9, 2008Assignee: Fujitsu LimitedInventors: Michio Kusayanagi, Tomohiro Ishihara
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Patent number: 7359389Abstract: A packet switch interfacing between a WAN and a LAN accommodating a terminal includes an address table storing a relation between an address of the terminal and an input port receiving a packet transmitted from the terminal, and an address learning unit for storing in the address table the relation between the source address of the received packet and the input port receiving the received packet. Further the packet switch includes a SW unit for effecting control to transmit the received packet according to whether or not stored in the address table, and then transmit the received packet to the WAN when a packet having a source address identical with the destination address of the received packet has not been received from the LAN.Type: GrantFiled: April 4, 2002Date of Patent: April 15, 2008Assignee: Fujitsu LimitedInventor: Michio Kusayanagi
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Patent number: 7187658Abstract: A data transmission apparatus is provided for transmitting data received from a user terminal device through a plurality of networks to a destination, the user terminal device executing communication using an Internet protocol. The data transmission apparatus includes a routing table storing information relating a destination address of the data and addresses of the plurality of networks; an information table storing static and dynamic information about the plurality of networks; and a selection unit selecting one or the plurality of networks, through which the data transmission apparatus transmits the data to the destination, based on the static and dynamic information. The data transmission apparatus enables data transmission through the appropriate network by selecting the appropriate network based on the static and dynamic information about the plurality of networks.Type: GrantFiled: February 2, 2001Date of Patent: March 6, 2007Assignee: Fujitsu LimitedInventors: Hisako Koyanagi, Michio Kusayanagi, Jun Tanaka, Tomohiro Ishihara
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Publication number: 20060182125Abstract: A converter for connecting its ATM network with other ATM networks through a LAN, which is provided with an address translation table storing external VPIs, internal VPIs uniquely assigned to the LAN, and opposing MAC addresses for opposing converters in correspondence and a processing unit for performing control for transmitting, to the LAN, frames changed from the external VPI/VCIs of headers of cells from its ATM network to the internal VPI/VCIs by referring to the address translation table and having opposing MAC addresses corresponding to the internal VPI/VCIs attached, removing the opposing MAC addresses of frames received from the LAN by referring to the address translation table, and transmitting cells changed from internal VPI/VCIs to external VPI/VCIs to its ATM network.Type: ApplicationFiled: June 9, 2005Publication date: August 17, 2006Inventors: Shinya Nakagaki, Toshikazu Inoue, Kazuya Kumazaki, Mineharu Hattori, Tetsuji Ichikawa, Nobuo Iguchi, Akio Morimoto, Michio Kusayanagi
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Patent number: 7058061Abstract: The present invention includes a detection unit for detecting an active virtual channel of arriving ATM cells, and a management memory unit for managing management information about the detected active virtual channel on a virtual-channel-to-virtual-channel basis, wherein a frame-by-frame process is performed on cells whose virtual channel identifier matches that of an active virtual channel managed by the management memory unit. In this manner, virtual-channel-by-virtual-channel processing is achieved in ATM leased line services that are provided on a virtual-path-by-virtual-path basis, thereby dispensing with needs to register a virtual channel into management memory in advance and allowing a large number of virtual channels to be accommodated.Type: GrantFiled: December 14, 2001Date of Patent: June 6, 2006Assignee: Fujitsu LimitedInventors: Jun Tanaka, Michio Kusayanagi
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Publication number: 20060109849Abstract: A first communication device receives an ATM cell bound for a second ATM device from a first ATM device via an ATM interface, and then the first communication device sends a data frame including the ATM cell to the second ATM device via wide area Ethernet. In addition, the first communication device sends a synchronization frame to the second ATM device via the wide area Ethernet continuously at a predetermined time interval in accordance with a clock frequency of the first ATM device. A second communication device receives the synchronization frame and measures a clock frequency of the first ATM device in accordance with a time interval of receiving the synchronization frame so as to reproduce a clock having the same frequency as the measured clock frequency. After that, the second communication device sends the clock to the second ATM device via an ATM interface.Type: ApplicationFiled: April 25, 2005Publication date: May 25, 2006Applicant: FUJITSU LIMITEDInventors: Norihisa Uchimoto, Koji Tatsumi, Kazuhisa Shimazaki, Koichiro Yamada, Satoshi Namura, Akio Morimoto, Michio Kusayanagi
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Publication number: 20040213248Abstract: Disclosed is a transmitting apparatus for transmitting a fixed-length cell and a variable-length packet together in one network. A first IF portion of the transmitting apparatus attaches a header corresponding to the protocol of a mixed network to a variable-length packet which arrives from a packet network and transmits it to the mixed network. A second IF portion removes the cell header from a fixed-length cell which arrives from a fixed-length cell network, attaches a header corresponding to the protocol of the mixed network instead, and transmits it to the mixed length. A third IF portion judges whether a data with a header which arrives from the mixed network is a fixed-length cell or a variable-length packet, replaces the header of the mixed network by a cell header if the data is a fixed-length cell and transmits the data to a fixed-length cell network, while removing the header of the mixed network if the data is a variable-length packet, and transmits the data to a packet network.Type: ApplicationFiled: March 5, 2001Publication date: October 28, 2004Inventors: Masato Okuda, Jun Tanaka, Michio Kusayanagi, Kazuto Nishimura
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Patent number: 6671257Abstract: In an ATM switching system, an ABR service is implemented with a specific ABR control capability. A subscriber line processing device includes calculating a turnaround delay time of a cell, based on a period during which the cell doubles back at a terminal. A switch or a demultiplexer capable of detecting congestion. A rate calculator calculates a transmission rate corresponding to an output channel, and writes the calculated rate to the cell. A rate changer changes the transmission rate according to congestion. The rate changer counts the number of communicating connections. Then the number of communicating connections which should exist in a certain predetermined period is estimated based on the counted number of communicating connections. A coefficient is determined based on the estimated number of communicating connections and an actual number of communicating connections, and a next estimated value is estimated using the coefficient.Type: GrantFiled: July 10, 2000Date of Patent: December 30, 2003Assignee: Fujitsu LimitedInventors: Toshio Soumiya, Koji Nakamichi, Takeshi Kawasaki, Naotoshi Watanabe, Michio Kusayanagi, Kenichi Kawarai
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Publication number: 20030123462Abstract: A packet switch interfacing between a WAN and a LAN accommodating a terminal includes an address table storing a relation between an address of the terminal and an input port receiving a packet transmitted from the terminal, and an address learning unit for storing in the address table the relation between the source address of the received packet and the input port receiving the received packet. Further the packet switch includes a SW unit for effecting control to transmit the received packet according to whether or not stored in the address table, and then transmit the received packet to the WAN when a packet having a source address identical with the destination address of the received packet has not been received from the LAN.Type: ApplicationFiled: April 4, 2002Publication date: July 3, 2003Inventor: Michio Kusayanagi
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Patent number: 6567484Abstract: A burst synchronizing circuit synchronizes a received data signal in a burst fashion and sampling phases with which the received data signal is sampled. A first part samples a data pattern with different sampling phases. A second part selects the received data signal sampled with an optimal sampling phase based on sampling phases with which the data pattern is detected.Type: GrantFiled: July 14, 1999Date of Patent: May 20, 2003Assignee: Fujitsu LimitedInventors: Masaki Hirota, Michio Kusayanagi
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Publication number: 20020054600Abstract: The present invention includes a detection unit for detecting an active virtual channel of arriving ATM cells, and a management memory unit for managing management information about the detected active virtual channel on a virtual-channel-to-virtual-channel basis, wherein a frame-by-frame process is performed on cells whose virtual channel identifier matches that of an active virtual channel managed by the management memory unit. In this manner, virtual-channel-by-virtual-channel processing is achieved in ATM leased line services that are provided on a virtual-path-by-virtual-path basis, thereby dispensing with needs to register a virtual channel into management memory in advance and allowing a large number of virtual channels to be accommodated.Type: ApplicationFiled: December 14, 2001Publication date: May 9, 2002Inventors: Jun Tanaka, Michio Kusayanagi
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Publication number: 20020003796Abstract: In a traffic control apparatus which controls data transmission rates of a plurality of channels, a transmission demand counter counts a transmission demand signal which a transmission demand generator generates at predetermined intervals set for each channel, a priority ranking determination portion determines a transmission priority ranking of each channel based on a value of the transmission demand counter by a round-robin method or other methods, and transmits a highest priority channel designation signal (cell transmission channel No.) which designates a transmission of a highest priority channel and a signal which decrements the transmission demand counter corresponding to the highest priority channel.Type: ApplicationFiled: January 24, 2001Publication date: January 10, 2002Applicant: FUJITSU LIMITEDInventors: Junichi Kugimiya, Takaharu Kajiwara, Michio Kusayanagi
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Publication number: 20010013067Abstract: A data transmission apparatus is provided for transmitting data received from a user terminal device through a plurality of networks to a destination, the user terminal device executing communication using an Internet protocol. The data transmission apparatus includes a routing table storing information relating a destination address of the data and addresses of the plurality of networks; an information table storing static and dynamic information about the plurality of networks; and a selection unit selecting one or the plurality of networks, through which the data transmission apparatus transmits the data to the destination, based on the static and dynamic information. The data transmission apparatus enables data transmission through the appropriate network by selecting the appropriate network based on the static and dynamic information about the plurality of networks.Type: ApplicationFiled: February 2, 2001Publication date: August 9, 2001Inventors: Hisako Koyanagi, Michio Kusayanagi, Jun Tanaka, Tomohiro Ishihara
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Patent number: 6226265Abstract: In a first UPC, a PCR is set as a monitor rate for each connection. If a transfer rate of a cell exceeds the PCR set for the connection, the cell is discarded. In a second UPC, an ACR is set as a monitor rate for each connection. If the transfer rate of the cell exceeds the ACR set for the connection, a lower priority is assigned to that cell. Additionally, with a configuration where one UPC monitors a varying rate, a parameter change process is controlled by obtaining a time between a passage time of a detected B-RM cell and an arrival of a user cell and comparing the obtained time with maximum and minimum delay standard values. A parameter table including some parameters is provided. A header of an arrived cell in a forward direction is extracted, and it is determined whether or not the arrived cell is a violation cell using the leaky bucket algorithm, etc. If the arrived cell is a violation cell, it is discarded.Type: GrantFiled: July 8, 1996Date of Patent: May 1, 2001Assignee: Fujitsu LimitedInventors: Koji Nakamichi, Takeshi Kawasaki, Tomohiro Ishihara, Toshio Soumiya, Masato Okuda, Michio Kusayanagi, Naotoshi Watanabe, Masafumi Katoh, Toshiyuki Sudo
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Patent number: 6094418Abstract: Specific ABR control capability for implementing an ABR service in an ATM switching system. A subscriber line processing device has a capability for calculating a turnaround delay time of a cell, based on a period during which the cell loops back at a terminal and returns. A switch or demultiplexer has a capability for detecting congestion. A rate calculator calculates a transmission rate corresponding to an output channel, and writes the calculated rate to the cell. A rate changer suitably changes the transmission rate according to the degree of occurrence of congestion. Additionally, the rate changer counts the number of communicating connections. At this time, the number of communicating connections which should exist in a certain predetermined period is estimated based on the counted number of communicating connections, which is counted in a period shorter than the predetermined period according to a predetermined method.Type: GrantFiled: March 7, 1997Date of Patent: July 25, 2000Assignee: Fujitsu LimitedInventors: Toshio Soumiya, Koji Nakamichi, Takeshi Kawasaki, Naotoshi Watanabe, Michio Kusayanagi, Kenichi Kawarai
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Patent number: 5949757Abstract: An ATM connection is a virtual communication path specified by VPI/VCI. A plurality of ATM connections that are directed to the same output line is defined as an ATM connection group. A connection UPC (Usage Parameter Control) facility is provided for each of the ATM connections and a connection group UPC facility is provided for the ATM connection group. The connection UPC facilities and the connection group UPC facility are operated in either the monitor mode or the control mode. In the monitor mode, when the rate of flow of packets into a network exceeds a threshold, a control unit is informed of it, but cells are allowed to enter the network as they are. In the control mode, when the rate of flow of cells into the network exceeds the threshold, cells the flow rate of which exceeds the threshold are discarded.Type: GrantFiled: October 7, 1996Date of Patent: September 7, 1999Assignee: Fujitsu LimitedInventors: Masafumi Katoh, Takeshi Kawasaki, Naotoshi Watanabe, Tetsuya Nishi, Toshio Soumiya, Koji Nakamichi, Tomohiro Ishihara, Michio Kusayanagi, Masato Okuda