Patents by Inventor Michio Ohue
Michio Ohue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6940741Abstract: A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.Type: GrantFiled: March 24, 2004Date of Patent: September 6, 2005Assignee: Hitachi, Ltd.Inventors: Ryuichi Saito, Hidekatsu Onose, Yutaka Kobayashi, Michio Ohue
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Publication number: 20040174731Abstract: A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.Type: ApplicationFiled: March 24, 2004Publication date: September 9, 2004Inventors: Ryuichi Saito, Hidekatsu Onose, Yutaka Kobayashi, Michio Ohue
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Publication number: 20030174553Abstract: A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.Type: ApplicationFiled: November 25, 2002Publication date: September 18, 2003Inventors: Ryuichi Saito, Hidekatsu Onose, Yutaka Kobayashi, Michio Ohue
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Publication number: 20020101757Abstract: A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.Type: ApplicationFiled: March 13, 2002Publication date: August 1, 2002Inventors: Ryuichi Saito, Hidekatsu Onose, Yutaka Kobayashi, Michio Ohue
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Patent number: 5936832Abstract: A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.Type: GrantFiled: January 28, 1997Date of Patent: August 10, 1999Assignee: Hitachi, Ltd.Inventors: Ryuichi Saito, Hidekatsu Onose, Yutaka Kobayashi, Michio Ohue
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Patent number: 5745336Abstract: A semiconductor integrated circuit apparatus according to the present invention has a capacitor formed in such a manner that a ferroelectric thin film is formed after a MOS transistor has been formed on a substrate thereof, a ferroelectric thin film made of, for example, PbZrTiO.sub.3 or SrTiO.sub.3 or the like is formed into a columnar shape to form electrodes positioned in direct contact with the side wall portions of said columnar ferroelectric thin film and the top portion is removed.Type: GrantFiled: April 6, 1995Date of Patent: April 28, 1998Assignee: Hitachi, Ltd.Inventors: Katsuaki Saito, Michio Ohue, Takuya Fukuda, JaiHo Choi, Yukinobu Miyamoto
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Patent number: 5629888Abstract: A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.Type: GrantFiled: January 18, 1994Date of Patent: May 13, 1997Assignee: Hitachi, Ltd.Inventors: Ryuichi Saito, Hidekatsu Onose, Yutaka Kobayashi, Michio Ohue
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Patent number: 5496410Abstract: In a plasma processing apparatus which forms a gaseous raw material into a plasma by using electron cyclotron resonance and processes a substrate, leading-edge opening portions of an introduction tube into which a gaseous raw material is introduced are formed in the inner wall surface of the container in such a way that they do not project within the vacuum container. A heater is wound around the introduction pipe so that the opening portions thereof can be heated. With this construction, even if a gaseous raw material which is a liquid or solid at normal temperature and normal pressure is made to flow, the gaseous raw material can be prevented from being liquefied or solidified in the opening portions of the introduction pipe, and the opening portions of the introduction pipe can be prevented from being clogged. In addition, since there are no projections within the vacuum container, the propagation of microwaves is not impeded, making it possible to uniformity process the substrate.Type: GrantFiled: March 10, 1993Date of Patent: March 5, 1996Assignee: Hitachi, Ltd.Inventors: Takuya Fukuda, Michio Ohue, Kazuo Suzuki
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Patent number: 5434742Abstract: A semiconductor integrated circuit apparatus according to the present invention has a capacitor formed in such a manner that a ferroelectric thin film is formed after a MOS transistor has been formed on a substrate thereof, a ferroelectric thin film made of, for example, PbZrTiO.sub.3 or SrTiO.sub.3 or the like is formed into a columnar shape to form electrodes positioned in direct contact with the side wall portions of said columnar ferroelectric thin film, and the top portion is removed.Type: GrantFiled: December 23, 1992Date of Patent: July 18, 1995Assignee: Hitachi, Ltd.Inventors: Katsuaki Saito, Michio Ohue, Takuya Fukuda, JaiHo Choi, Yukinobu Miyamoto
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Patent number: 5347100Abstract: Disclosed are a semiconductor device comprising a semiconductor substrate, a first metal connection layers, a first substrate oxide layer having a specific form, and a second connection pattern layer; a process for producing the device; and a microwave plasma treatment apparatus having gas feed ports in a specific position. The highly reliable semiconductor devices can be produced at a high rate at high yields.Type: GrantFiled: March 26, 1992Date of Patent: September 13, 1994Assignees: Hitachi, Ltd., Hitachi Engineering & Services, Inc.Inventors: Takuya Fukuda, Michio Ohue, Fumiyuki Kanai, Atsuyoshi Koike, Katsuaki Saito, Kazuo Suzuki
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Patent number: 5307304Abstract: A semiconductor memory device has a plurality of memory cells in an array, into which the memory cells data is writable, and which can subsequently be read. Each memory cell has a switching element with one terminal connected to a bit line of the array another terminal connected to at least one ferroelectric capacitor, and a control terminal connected to a word line. The cell may then be operated to detect the change in polarization of the ferroelectric capacitor when a voltage is applied which is not sufficient to cause a change of state of the ferroelectric capacitor. Alternatively, a ferroelectric capacitor and a capacitor other than a ferroelectric capacitor is connected to the switching element. In a further alternative, a plurality of ferroelectric capacitors are connected to the switching element, so that different data are writable into each.Type: GrantFiled: July 31, 1991Date of Patent: April 26, 1994Assignee: Hitachi, Ltd.Inventors: Ryuichi Saito, Hidekatsu Onose, Yutaka Kobayashi, Michio Ohue
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Patent number: 5233216Abstract: A dielectric isolated substrate wherein a connecting polycrystalline silicon layer has smooth and flat surface on which a single crystal support is bonded and has a densified crystal structure, or is obtained by further heat treatment at 800.degree. C. or higher after deposition, or has no orientation as to growth direction of polycrystalline silicon, or a buffering layer is formed between a polycrystalline silicon layer and a single crystal support, is excellent in bonding between the single crystal support and the polycrystalline silicon layer by preventing voids at the bonded surface, while enhancing reliability.Type: GrantFiled: October 19, 1992Date of Patent: August 3, 1993Assignee: Hitachi, Ltd.Inventors: Yohsuke Inoue, Michio Ohue, Saburoo Ogawa, Kiyoshi Thukuda, Takeshi Tanaka, Yasuhiro Mochizuki
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Patent number: 5211825Abstract: A plasma processing apparatus performs a sample processing and cleaning processing. The sample processing is carried out by generating a reaction gas plasma within a vacuum vessel of the apparatus using an electron cyclotron resonance excitation. The cleaning processing is carried out to clean the inner wall of the vacuum vessel by generating a cleaning gas plasma within the vacuum vessel. Generation of the cleaning gas plasma takes place by using either one of the following processes:(1) The plasma diameter during the cleaning processing is made larger than that during the sample processing. The end of the plasma during cleaning processing is made to reach the inside wall of the vacuum vessel.(2) The cleaning gas plasma is scanned within the vacuum vessel.Type: GrantFiled: September 23, 1991Date of Patent: May 18, 1993Assignee: Hitachi, Ltd.Inventors: Katsuaki Saito, Takuya Fukuda, Michio Ohue, Tadasi Sonobe
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Patent number: 5182495Abstract: In a plasma processing apparatus using ECR, faces in contact with plasma excepting a substance to be processed are covered by an insulating material. By such configuration, discharge caused between the plasma and the substance to be processed in plasma processing is prevented beforehand.Type: GrantFiled: November 29, 1990Date of Patent: January 26, 1993Assignee: Hitachi, Ltd.Inventors: Takuya Fukuda, Michio Ohue, Tadasi Sonobe
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Patent number: 5178962Abstract: A composite of metal and an organic film having a high adhesiveness without deterioration of film quality is provided by exposing the surface of organic film to at least one of chemically reactive gas phase molecules and gas phase ions thereby forming functional groups on the surface of organic film, and forming a metallic film thereon through the functional groups.Type: GrantFiled: March 19, 1990Date of Patent: January 12, 1993Assignees: Hitachi, Ltd., Hitachi Chemical Company Ltd.Inventors: Toshio Miyamoto, Kunio Miyazaki, Ryuji Watanabe, Osamu Miura, Yukio Ookoshi, Yuichi Satsu, Michio Ohue, Shigeru Takahashi, Yoshiyuki Tsuru
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Patent number: 5162633Abstract: The present invention relates to a plasma treatment apparatus for making plasma surface processing of a specimen such as thin-film formation, etching, sputtering or plasma oxidation by use of plasma produced through microwave discharge. In a specimen chamber provided with a specimen table for holding at least one specimen thereon, a microwave is introduced from a direction intersecting a magnetic line of force so as to propagate in the longitudinal direction of an ECR region or in a direction along the plane of the ECR region. Since the microwave is introduced from the transverse direction of the specimen chamber, the provision of a microwave introducing window at an upper portion of the specimen chamber is not required and hence a counter electrode for applying an electric field to the specimen can be disposed at the upper portion of the specimen chamber, thereby making it possible to apply a uniform electric field to the specimen so that the specimen is subjected to a uniform treatment.Type: GrantFiled: June 27, 1989Date of Patent: November 10, 1992Assignees: Hitachi, Ltd., Hitachi Engineering and Services Co., Ltd.Inventors: Tadasi Sonobe, Kazuo Suzuki, Takuya Fukuda, Michio Ohue
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Patent number: 5107307Abstract: A semiconductor optical modulator is provided wherein very thin films of two kinds of semiconductors having different band gaps are laminated alternately to form a multi-quantum well (MQW) structure, also called a super-lattice structure, and current is injected into the MQW structure to change the corresponding optical absorption and refractive index characteristic thereof so that a sufficient on/off ratio can be obtained.Type: GrantFiled: August 7, 1991Date of Patent: April 21, 1992Assignee: Hitachi, Ltd.Inventors: Hidekatsu Onose, Michio Ohue, Masayoshi Naito
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Patent number: 5084355Abstract: A laminar structure comprising an organic material and an inorganic material; for example, a coating structure on an organic substrate comprising an organic material on which an inorganic film must be formed and a method of producing the structure, a structure which is suitable for increasing the reliability of an optical disk and a method of producing this, a wiring structure on an organic substrate comprising the organic material on which electric wiring must be formed and a method of producing this, and a structure suitable for increasing the reliability of a semiconductor integrated circuit device and a method of producing this.Type: GrantFiled: April 13, 1989Date of Patent: January 28, 1992Assignee: Hitachi, Ltd.Inventors: Shigeru Takahashi, Takuya Fukuda, Toshiya Satoh, Seikichi Tanno, Michio Ohue, Naohiro Momma, Yutaka Misawa