Patents by Inventor Michio Sawada

Michio Sawada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multiprocessor system with processor arbitration and priority level setting by the selected processor
    Patent number: 5590380
    Abstract: According to this invention, an interrupt right control unit transfers an interrupt right to a succeeding processor module. When the processor module has the interrupt right, and the interrupt right control unit receives an interrupt signal, the interrupt right control unit outputs an interrupt signal to a corresponding processor and stops transferring the interrupt right. The corresponding processor then sets the priority levels for the processor modules and performs interrupt processing in response to the interrupt signal. Then the corresponding processor causes the interrupt right control unit to continue the transferring of the interrupt right.
    Type: Grant
    Filed: February 10, 1995
    Date of Patent: December 31, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kunio Yamada, Michio Sawada