Patents by Inventor Michiya Inoue

Michiya Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6892110
    Abstract: A numerical control unit having a load monitoring function for monitoring a load on a tool drive source during a machining operation. The numerical control unit includes a load monitoring section for monitoring the load on an electric motor; a wear recognizing section for recognizing the current extent of tool wear; a storing section for storing a plurality of preset limit load values corresponding individually to predetermined various extents of tool wear; a calculating section for calculating the current limit load value corresponding to the current extent of tool wear recognized in the wear recognizing section, based on the plurality of preset limit load values stored in the storing section; and a comparing section for comparing the load on the electric motor, monitored in the load monitoring section, to the current limit load value calculated in the calculating section, and for judging on the abnormality of the load.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: May 10, 2005
    Assignee: Fanuc LTD
    Inventors: Michiya Inoue, Hajime Ishii
  • Publication number: 20040210867
    Abstract: A sequence program editing apparatus capable of easily replacing duplicated signal names. The apparatus detects duplicated signal names used in a sequence program and displays locations used with the signal names in the form of a list. Names to be rewritten are selected from among the duplicates and checked. New signal names are directly entered, and a signal name rewriting execution command is inputted. Alternatively, a search range and a sort of assignable signal name are designated by setting start and end addresses. When an execution command is inputted, signal names of designated sort are automatically extracted and entered as new names. The subsequent input of a signal name rewriting execution command automatically replaces the duplicated signal names in the designated locations with signal names newly entered. It is possible to easily replace duplication of the same signal names. If a range of renaming contacts associated with the coils is set, the contacts are renamed.
    Type: Application
    Filed: April 19, 2004
    Publication date: October 21, 2004
    Applicant: FANUC LTD
    Inventors: Michiya Inoue, Kimio Maeda, Junichi Yamaki, Kiharu Yamamoto
  • Publication number: 20040174130
    Abstract: A numerical control unit having a load monitoring function for monitoring a load on a tool drive source during a machining operation. The numerical control unit includes a load monitoring section for monitoring the load on an electric motor; a wear recognizing section for recognizing the current extent of tool wear; a storing section for storing a plurality of preset limit load values corresponding individually to predetermined various extents of tool wear; a calculating section for calculating the current limit load value corresponding to the current extent of tool wear recognized in the wear recognizing section, based on the plurality of preset limit load values stored in the storing section; and a comparing section for comparing the load on the electric motor, monitored in the load monitoring section, to the current limit load value calculated in the calculating section, and for judging on the abnormality of the load.
    Type: Application
    Filed: February 19, 2004
    Publication date: September 9, 2004
    Applicant: Fanuc Ltd.
    Inventors: Michiya Inoue, Hajime Ishii
  • Patent number: 5253140
    Abstract: An I/O unit has a fixed unit such as a housing provided with a multiplicity of connection terminals and an LED display module unit. A mounting/dismounting unit is provided with a terminal block including connection terminals to be coupled with the connection terminals of the fixed unit. The mounting/dismounting unit has a hinge disposed at an end thereof and the fixed unit has a pin and a grip capable of being engaged with the hinge. The grip is pulled out to a position to be used and then further pulled out, whereby the mounting/dismounting unit is forced out, drawing an arc about the pin and separated from the fixed unit. With this arrangement, an I/O module with a mounting/dismounting unit capable of being easily removed is provided.
    Type: Grant
    Filed: October 8, 1991
    Date of Patent: October 12, 1993
    Assignee: Fanuc Ltd.
    Inventors: Michiya Inoue, Takashi Yamauchi
  • Patent number: 5175487
    Abstract: An output circuit provided with a photo coupler for transmitting a control signal from a control circuit to an output side in an electrically isolated condition, a load driving transistor (15), and a power supply stabilizing circuit (15) for supplying an electric power for driving the load driving transistor (13) from a load side power supply (13). The power supply stabilizing circuit includes a low voltage detection circuit and an input/output short-circuiting circuit, and the input/output short-circuiting circuit is made conductive when an input voltage to the power supply stabilizing circuit is determined to be lower than a predetermined voltage. As a result, even if the load side power supply has a low voltage, it can drive the load driving transistor, and thus the load side power supply can be used over a wide range of voltages.
    Type: Grant
    Filed: November 28, 1989
    Date of Patent: December 29, 1992
    Assignee: Fanuc Limited
    Inventor: Michiya Inoue
  • Patent number: 5097438
    Abstract: Electric signal output equipment that does not require circuits to hold signals in a static manner, that is small in size, and that is cheaper to produce is disclosed.
    Type: Grant
    Filed: April 17, 1989
    Date of Patent: March 17, 1992
    Assignee: Fanuc, Ltd.
    Inventor: Michiya Inoue
  • Patent number: 5050118
    Abstract: A programmable logic controller (PLC) device for effecting arithmetic operations of a sequential program by a microprocessor (1). The PLC device comprises a periodic signal generating circuit (2) for generating an interruption signal at a predetermined time interval, an input circuit (7) for receiving an external input signal, and circuits for effecting filter processing by reading a signal output by the input circuit at a predetermined time interval in response to the interruption signal. Since the filtering processing is effected by the microprocessor, a time constant of a filter can be changed by a program and can be also changed for each signal.
    Type: Grant
    Filed: December 13, 1990
    Date of Patent: September 17, 1991
    Assignee: Fanuc Ltd.
    Inventors: Michiya Inoue, Takashi Yamauchi
  • Patent number: 5016086
    Abstract: An IC card having a connection portion, a changeover switch and card-shaped memory means in which an integrated circuit is accommodated within a prescribed case and has a processor and memory. Lead portions for connecting contact pins of said connecting portion and switch terminals of said switch to an internal circuit pattern, are packed in an insulating adhesive in order to provide a case with a hermetic structure.
    Type: Grant
    Filed: February 14, 1989
    Date of Patent: May 14, 1991
    Assignee: Fanuc Ltd.
    Inventors: Michiya Inoue, Yutaka Mizuno
  • Patent number: 4761566
    Abstract: An input circuit which converts a contact signal into a voltage signal is provided. The voltage signal output corresponding to the ON/OFF operation of the contact differs in polarity with methods of connection of the contact to a current limiting resistor at one end thereof between a power source and ground. To handle this, noncoincidence is detected between the output voltage signal level and the voltage level at the other end of the current limiting resistor connected to a voltage signal output terminal. An output signal is then generated, thereby obtaining a voltage signal output which undergoes the same polarity change corresponding to the ON and OFF states of the contact, irrespective of the method of connection of the contact used.
    Type: Grant
    Filed: December 16, 1986
    Date of Patent: August 2, 1988
    Assignee: Fanuc Ltd
    Inventors: Michiya Inoue, Junichi Satoh
  • Patent number: 4755934
    Abstract: An input/output board (10 to 12) address selection system selects a desired address in the pluralities of input and output boards (10 to 12) connected to a common bus (6) of an input/output interface unit (1) connected via a serial data transmission system to a main control unit (60). A programmable address translation circuit (5) is provided for deriving a slot select signal (s1 to s16) and an in-board address (BA) from an address for an input/output board accessing address which is provided from a control circuit (2) of the input/output interface unit (1). One of the input and output boards (10 to 12) is selected by the slot select signal (s1 to s16), and one of the addresses in the selected input or output board is selected by the in-board address (BA).
    Type: Grant
    Filed: November 20, 1985
    Date of Patent: July 5, 1988
    Assignee: Fanuc Ltd.
    Inventor: Michiya Inoue
  • Patent number: 4681997
    Abstract: A wire-cut, electric discharge machining power supply unit charges a capacitor (4) by a DC power source (2) via a switching element (1), and discharges the stored charges of the capacitor (4) between a workpiece (6) and a wire electrode (7) via another switching element (5). A single-polarity discharge current of a small pulse width is supplied between the wire electrode (7) and the workpiece (6). A series circuit of an impedance element (50, 80) other than a capacitance and a diode (51), is connected in a backward direction with respect to a capacitor charging voltage to effect recharging of the capacitor (4) with high efficiency.
    Type: Grant
    Filed: June 10, 1985
    Date of Patent: July 21, 1987
    Assignee: Fanuc Ltd
    Inventors: Michiya Inoue, Haruki Obara, Shunzo Izumiya
  • Patent number: 4564768
    Abstract: A contactless relay wherein the application of an A.C. signal to the primary winding of a transformer is controlled by a command input, and the A.C. signal obtained from the secondary winding of the transformer is rectified into a D.C. signal by a rectifier circuit. The D.C. signal drives a transistor switching element for switching action. The switching element includes a single bipolar transistor, or a pair of bipolar transistors which can be connected in parallel to increase the current-carrying capacity of the relay. The output terminals of the relay can be rendered non-polar by constructing the relay of two bipolar transistors having commonly connected emitters and commonly connected bases.
    Type: Grant
    Filed: April 27, 1983
    Date of Patent: January 14, 1986
    Assignee: Fanuc Ltd.
    Inventors: Hidetsugu Komiya, Michiya Inoue
  • Patent number: 4554462
    Abstract: Disclosed is a non-polarized, contactless relay constructed of electronic circuitry devoid of mechanical contacts but capable of performing the same function as a relay with such contacts. The relay includes a transformer, a control circuit for applying an oscillatory signal to the primary windings of the transformer in accordance with a command input, a rectifying circuit for rectifying A.C. power obtained from the secondary windings of the transformer in response to the oscillatory signal applied to the primary windings, a smoothing circuit which smooths the rectified output produced by the rectifying circuit for delivering D.C. power, and switching means composed of a pair of MOS-type field-effect transistors driven by the D.C. output of the smoothing circuit. The command input, namely "1" or "0" logic, applied to the control circuit results in the supply of the D.C.
    Type: Grant
    Filed: March 11, 1983
    Date of Patent: November 19, 1985
    Assignee: Fanuc Limited
    Inventors: Hidetsugu Komiya, Michiya Inoue, Yoshiyuki Saitoh
  • Patent number: 4517663
    Abstract: A method and system for rewriting data in a non-volatile memory in which the rewriting of one access unit of stored data is executed by erase and write cycles, the stored data being protected in the event of an interruption in electric power. In rewriting into second data the first data which is stored in a data storage area of the non-volatile memory, either the first or the second data is stored in a save area of the non-volatile memory, after which the first data in the data storage area is erased, followed by the writing of the second data in the data storage region to complete the rewrite operation.
    Type: Grant
    Filed: December 22, 1983
    Date of Patent: May 14, 1985
    Assignee: Fujitsu Fanuc Limited
    Inventors: Ryoji Imazeki, Michiya Inoue
  • Patent number: 4447887
    Abstract: A method and system for rewriting data in a non-volatile memory in which the rewriting of one access unit of stored data is executed by erase and write cycles, the stored data being protected in the event of an interruption in electric power. In rewriting into second data the first data which is stored in a data storage area of the non-volatile memory, either the first or the second data is stored in a save area of the non-volatile memory, after which the first data in the data storage area is erased, followed by the writing of the second data in the data storage region to complete the rewrite operation.
    Type: Grant
    Filed: September 2, 1980
    Date of Patent: May 8, 1984
    Assignee: Fujitsu Fanuc Limited
    Inventors: Ryoji Imazeki, Michiya Inoue
  • Patent number: 4445199
    Abstract: A portable bubble memory apparatus having a bubble memory cassette for accommodating a bubble memory element, and a portable cassette adapter provided with a cassette holder for loading and unloading the bubble memory cassette, the portable cassette adapter housing a control circuit and peripheral circuitry for the bubble memory element. A signal generator generates a signal to indicate whether the bubble memory cassette has been loaded at the correct position within the cassette holder. If the bubble memory cassette is displaced from the correct position, the generated signal causes the exchange of information between the bubble memory cassette and an external unit to cease.
    Type: Grant
    Filed: July 10, 1981
    Date of Patent: April 24, 1984
    Assignee: Fujitsu Fanuc Limited
    Inventors: Ryoji Imazeki, Hidetsugu Komiya, Michiya Inoue
  • Patent number: 4393500
    Abstract: A method and system for rewriting data in a non-volatile memory of the type which requires a comparatively long period of time for the rewriting of stored data. The occurrence of an interruption in power can be detected on the basis of the content of the non-volatile memory, and detection takes place after the resumption of power even if the interruption in power takes place during the rewriting operation. The non-volatile memory is provided with a flag area in which information indicating the initiation of a modification is written prior to the rewriting operation, and in which information indicating the termination of a modification is written after the rewriting operation, whereby an interruption in power which has occurred during rewriting is readily detected by reading out the information from the flag area after the restoration of power.
    Type: Grant
    Filed: August 20, 1980
    Date of Patent: July 12, 1983
    Assignee: Fujitsu Fanuc Limited
    Inventors: Ryoji Imazeki, Michiya Inoue
  • Patent number: 4368532
    Abstract: A method of checking a memory in a computer system having memory for storing at least one logical block composed of a plurality of words, and a processor for retrieving data from the memory to perform a memory check wherein the method includes inserting an operational control word into the logical block in advance, sequentially subjecting each word in the logical block to a prescribed operation, such as an exclusive-OR operation applied to corresponding ones of the bits in each word, and then determining whether or not the result of the operation is the same as a predetermined value. The operational control word, before being inserted into the logical block, is determined in such a manner that the result of the operation will be equivalent to a predetermined value, such as all "0"s.
    Type: Grant
    Filed: July 30, 1980
    Date of Patent: January 11, 1983
    Assignee: Fujitsu Fanuc Limited
    Inventors: Ryoji Imazeki, Michiya Inoue