Abstract: A radio frequency module includes a filter that is arranged on a first path connecting a common terminal and a first input/output terminal and has a first frequency band as a pass band, another filter that is arranged on a second path connecting the common terminal and a second input/output terminal and has a second frequency band different from the first frequency band as a pass band, and a detection circuit connected to the first path and configured to detect a leakage signal in the second frequency band leaked to the first path and output a signal indicating a detection result.

Abstract: A filter circuit includes a filter that is disposed on a path connecting a common terminal and an input output terminal and uses a first frequency band as a pass band, a filter that is disposed on a path connecting the common terminal and an input output terminal and uses a second frequency band different from the first frequency band as a pass band, and a phase adjustment circuit that has an input terminal connected to the path and an output terminal connected to the path, and adjusts a phase of a signal in the first frequency band input from the path and outputs a signal having a phase different from a phase of the signal in the first frequency band to the output terminal, wherein the path and the path are paths through which a received signal passes.

Abstract: A front-end circuit includes a first filter on a path connecting a common terminal and a first input/output terminal, a second filter on a path connecting the common terminal and a second input/output terminal, and a first switch on the path connecting the common terminal and the first input/output terminal. The first switch receives at least one of a first control signal and a second control signal. The first control signal increases a difference between a first voltage applied to the first switch to turn the first switch to a non-conductive state and a threshold voltage determining whether or not the first switch is turned to a conductive state. The second control signal increases a difference between a second voltage applied to the first switch to turn the first switch to the conductive state and the threshold voltage.

Abstract: A radio frequency module includes a filter that is arranged on a first path connecting a common terminal and a first input/output terminal and has a first frequency band as a pass band, another filter that is arranged on a second path connecting the common terminal and a second input/output terminal and has a second frequency band different from the first frequency band as a pass band, and a detection circuit connected to the first path and configured to detect a leakage signal in the second frequency band leaked to the first path and output a signal indicating a detection result.

Abstract: A filter circuit includes a filter that is disposed on a path connecting a common terminal and an input output terminal and uses a first frequency band as a pass band, a filter that is disposed on a path connecting the common terminal and an input output terminal and uses a second frequency band different from the first frequency band as a pass band, and a phase adjustment circuit that has an input terminal connected to the path and an output terminal connected to the path, and adjusts a phase of a signal in the first frequency band input from the path and outputs a signal having a phase different from a phase of the signal in the first frequency band to the output terminal, wherein the path and the path are paths through which a received signal passes.

Abstract: A front-end circuit includes a first filter on a path connecting a common terminal and a first input/output terminal, a second filter on a path connecting the common terminal and a second input/output terminal, and a first switch on the path connecting the common terminal and the first input/output terminal. The first switch receives at least one of a first control signal and a second control signal. The first control signal increases a difference between a first voltage applied to the first switch to turn the first switch to a non-conductive state and a threshold voltage determining whether or not the first switch is turned to a conductive state. The second control signal increases a difference between a second voltage applied to the first switch to turn the first switch to the conductive state and the threshold voltage.

Abstract: A clock and data recovery circuit includes a multiphase clock generator circuit which generates a multiphase clock having a plurality of clocks, a sampling circuit which samples a received data signal transferring serial data in synchronism with each of the plurality of clocks, and generates a plurality of data signals, a data recovery unit which generates a selection signal indicating a data signal having an appropriate phase among the plurality of data signals, and a storage unit which stores the selection signal. The data recovery unit selects one of the plurality of data signals, based on the selection signal read from the storage unit, and a clock corresponding to the selected data signal.

Abstract: A clock and data recovery circuit includes a multiphase clock generator circuit which generates a multiphase clock having a plurality of clocks, a sampling circuit which samples a received data signal transferring serial data in synchronism with each of the plurality of clocks, and generates a plurality of data signals, a data recovery unit which generates a selection signal indicating a data signal having an appropriate phase among the plurality of data signals, and a storage unit which stores the selection signal. The data recovery unit selects one of the plurality of data signals, based on the selection signal read from the storage unit, and a clock corresponding to the selected data signal.

Abstract: A spread spectrum controller (20) controls a PLL (10) so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller (30) controls at least one of a phase detector (11), a loop filter (12), a voltage-controlled oscillator (13), and a frequency divider (14) in the PLL (10) during operation of the spread spectrum controller (20) to change a loop bandwidth of the PLL (10).

Abstract: An external input operation clock signal is required for operating a conventional A/D converter, and the performance of the A/D converter is undesirably determined by the characteristics of the external input operation clock. A clock generator circuit for automatically generating an operation clock is provided inside an A/D converter to make the A/D converter require no external input operation clock. Further, a circuit for detecting the operation times of the constituents of the A/D converter is provided to generate a clock with which the A/D converter is optimally operated, thereby realizing high-speed operation and low power consumption.

Abstract: A calibration circuit (19) adjusts at least one of one of a charging current of a charge pump circuit (12) and a capacitance value of a filter capacitor in a loop filter circuit (13) and a gain of a voltage controlled oscillator (14), depending on a frequency of a reference clock signal input to a calibration circuit (10).

Abstract: A spread spectrum controller (20) controls a PLL (10) so that the PLL outputs a spread-spectrum processed clock signal. A loop bandwidth controller (30) controls at least one of a phase detector (11), a loop filter (12), a voltage-controlled oscillator (13), and a frequency divider (14) in the PLL (10) during operation of the spread spectrum controller (20) to change a loop bandwidth of the PLL (10).

Abstract: A calibration circuit (19) adjusts at least one of one of a charging current of a charge pump circuit (12) and a capacitance value of a filter capacitor in a loop filter circuit (13) and a gain of a voltage controlled oscillator (14), depending on a frequency of a reference clock signal input to a calibration circuit (10).

Abstract: An external input operation clock signal is required for operating a conventional A/D converter, and the performance of the A/D converter is undesirably determined by the characteristics of the external input operation clock. A clock generator circuit (104) for automatically generating an operation clock is provided inside an A/D converter (100) to make the A/D converter require no external input operation clock. Further, a circuit for detecting the operation times of the constituents of the A/D converter is provided to generate a clock with which the A/D converter is optimally operated, thereby realizing high-speed operation and low power consumption.

Abstract: To tune the center frequency of a gm-C filter, which is a bandpass filter with a narrow bandwidth, to a target frequency, only while the filter is being tuned, the original circuit configuration of the filter is replaced with an alternative configuration that realizes a high signal-to-noise ratio. A characteristic tuner generates and inputs an impulse signal, pulse signal or step signal to the filter being tuned and thereby detects and adjusts the center frequency of the filter. And the tuning result is stored on a nonvolatile memory for future reuse. When the filter is operated, the characteristic tuner stops operating to cut down the power dissipation.

Abstract: To tune the center frequency of a gm-C filter, which is a bandpass filter with a narrow bandwidth, to a target frequency, only while the filter is being tuned, the original circuit configuration of the filter is replaced with an alternative configuration that realizes a high signal-to-noise ratio. A characteristic tuner generates and inputs an impulse signal, pulse signal or step signal to the filter being tuned and thereby detects and adjusts the center frequency of the filter. And the tuning result is stored on a nonvolatile memory for future reuse. When the filter is operated, the characteristic tuner stops operating to cut down the power dissipation.