Patents by Inventor Michiyuki Hirata

Michiyuki Hirata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Level conversion circuit for converting ECL-level signal into TTL-level signal
    Patent number: 5138199
    Abstract: A level conversion circuit includes a level converter and a buffer gate circuit. A level converter includes two pairs of P-channel MOS transistors. A first input signal is supplied to one of the pair of P-channel MOS transistors and a second input signal is supplied to one of the other pair of P-channel MOS transistors. Each of the first and second input signals are complementary ECL-level signals. The buffer gate circuit includes two BiCMOS circuits. A first output signal from one of the pairs of P-channel MOS transistors is supplied to a gate of an N-channel MOS transistor provided in one of the BiCMOS circuits. A second output signal from the other pair of P-channel MOS transistors is supplied to a gate of an N-channel MOS transistor provided in the other BiCMOS circuit. The first input signal is supplied directly to a gate of a P-channel MOS transistor provided in one the BiCMOS circuits.
    Type: Grant
    Filed: May 17, 1990
    Date of Patent: August 11, 1992
    Assignee: Fujitsu Limited
    Inventors: Michiyuki Hirata, Chikai Ono, Osamu Nomura, Toru Fukui, Susumu Terawaki
  • Synchronous semiconductor memory device
    Patent number: 4882712
    Abstract: A synchronous semiconductor memory device has a noise preventing part for preventing a noise from being transmitted to a memory cell array, where the noise is caused by a change in a write data.
    Type: Grant
    Filed: September 26, 1988
    Date of Patent: November 21, 1989
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Chikai Ohno, Michiyuki Hirata