Patents by Inventor Mickaël Guibert

Mickaël Guibert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210241071
    Abstract: A computer for computing a convolutional layer of an artificial neural network, includes at least one set of at least two partial sum computing modules connected in series, a storage member for storing the coefficients of at least one convolution filter, each partial sum computing module comprising at least one computing unit configured so as to carry out a multiplication of an item of input data of the computer and a coefficient of a convolution filter, followed by an addition of the output of the preceding partial sum computing module in the series, each set furthermore comprising, for each partial sum computing module except the first in the series, a shift register connected at input for storing the item of input data for the processing duration of the preceding partial sum computing modules in the series.
    Type: Application
    Filed: August 28, 2019
    Publication date: August 5, 2021
    Inventors: Vincent LORRAIN, Olivier BICHLER, Mickael GUIBERT
  • Patent number: 8751553
    Abstract: The invention provides a filtering device with hierarchical structure making it possible to carry out finite impulse response and infinite impulse response linear filtering functions and which can be combined with one or more devices of the same type. The device includes at least one first and one second filtering module having means for carrying out filtering functions with N configurable coefficients. A first subset of the N coefficients of a module is configured to carry out nonrecursive filtering functions, a second subset of the coefficients configured to carry out recursive filtering functions, one or more feedback loops able to be activated per module, at least one result sample of the filtering being generated at each clock cycle. The invention also provides a reconfigurable filtering device using at least two filtering devices with the hierarchical structure.
    Type: Grant
    Filed: August 21, 2009
    Date of Patent: June 10, 2014
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Suresh Pajaniradja, Mickael Guibert, Renaud Schmit
  • Patent number: 8577172
    Abstract: The invention provides a reconfigurable module allowing morphological operations to be carried out for image processing. The module includes an operational block having five inputs, three outputs, three adders/subtracters and four logic blocks. The logic blocks provide various routings between the three adders/subtracters to enable the outputs to deliver the result of basic operations carried out on the five inputs. The reconfigurable module has a reduced number of components while at the same time allowing various morphological operations to be performed whose parameters can be modified. Furthermore, the reconfigurable module is serially combined to carry out more complex morphological operations. The invention also provides a method for implementing the reconfigurable module allowing an integral image, an eroded image, an expanded image, a distance image or projections along the rows and columns of the original image to be determined starting from an original image.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: November 5, 2013
    Assignee: Commissariat a l'Energie Atomique et aux Energies Alternatives
    Inventors: Mickael Guibert, Renaud Schmit
  • Publication number: 20120134586
    Abstract: A device for recognizing and locating objects in an image by scanning detection windows comprises a data stream architecture designed in pipeline form for concurrent hardware tasks and includes means for generating a descriptor for each detection window, a histogram determination unit determining a histogram of orientation gradients for each descriptor, and N processing units in parallel, capable of analyzing the histograms as a function of parameters associated with the descriptors to provide a partial score representing the probability that the descriptor concerned contains at least part of the object to be recognized, the sum of the partial scores of each detection window providing a global score representing the probability that the detection window contains the object to be recognized.
    Type: Application
    Filed: November 23, 2009
    Publication date: May 31, 2012
    Applicant: Commissariat A L'Energie Atomique Et Aux Energies Alternative
    Inventors: Suresh Pajaniradja, Eva Dokladalova, Mickael Guibert, Michaël Zemb
  • Publication number: 20110208795
    Abstract: The invention provides a filtering device with hierarchical structure making it possible to carry out finite impulse response and infinite impulse response linear filtering functions and which can be combined with one or more devices of the same type. The device includes at least one first and one second filtering module having means for carrying out filtering functions with N configurable coefficients. A first subset of the N coefficients of a module is configured to carry out nonrecursive filtering functions, a second subset of the coefficients configured to carry out recursive filtering functions, one or more feedback loops able to be activated per module, at least one result sample of the filtering being generated at each clock cycle. The invention also provides a reconfigurable filtering device using at least two filtering devices with the hierarchical structure.
    Type: Application
    Filed: August 21, 2009
    Publication date: August 25, 2011
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Suresh Pajaniradja, Mickael Guibert, Renaud Schmit
  • Publication number: 20110164830
    Abstract: The invention provides a reconfigurable module allowing morphological operations to be carried out for image processing. The module includes an operational block having five inputs, three outputs, three adders/subtracters and four logic blocks. The logic blocks provide various routings between the three adders/subtracters to enable the outputs to deliver the result of basic operations carried out on the five inputs. The reconfigurable module has a reduced number of components while at the same time allowing various morphological operations to be performed whose parameters can be modified. Furthermore, the reconfigurable module is serially combined to carry out more complex morphological operations. The invention also provides a method for implementing the reconfigurable module allowing an integral image, an eroded image, an expanded image, a distance image or projections along the rows and columns of the original image to be determined starting from an original image.
    Type: Application
    Filed: August 18, 2009
    Publication date: July 7, 2011
    Applicant: Commissariat a L'Energie Atomique et Aux Energies Alternatives
    Inventors: Mickael Guibert, Renaud Schmit
  • Patent number: 7418579
    Abstract: The invention relates to a component with a large grain dynamically reconfigurable architecture for processing of data by processing units organized in rows and connected to each other through interconnections so as to enable processing in pipeline or parallel mode or in dependent rows mode. All data types may be processed and the component may process several applications at the same time. The choice of the grain, control at several levels with limited control interconnection resources and the data distribution circuit enable local or general reconfiguration of the component in one clock cycle.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: August 26, 2008
    Assignee: Commissariat a l'Energie
    Inventors: Mickaël Guibert, Fabien Clermidy, Thierry Collette
  • Publication number: 20070113054
    Abstract: The invention relates to a component with a large grain dynamically reconfigurable architecture for processing of data by processing units organized in rows and connected to each other through interconnections so as to enable processing in pipeline or parallel mode or in dependent rows mode. All data types may be processed and the component may process several applications at the same time. The choice of the grain, control at several levels with limited control interconnection resources and the data distribution circuit enable local or general reconfiguration of the component in one clock cycle.
    Type: Application
    Filed: September 30, 2004
    Publication date: May 17, 2007
    Inventors: Mickael Guibert, Fabien Clermidy, Thierry Collette