Abstract: Methods and apparatus are disclosed for transparently resuming the network connection after a reset or reboot. In one aspect a data processing apparatus comprises an operating system unit configured to create and store state information comprising one or more parameters for a network connection between a first computing device and a second computing device; a management interface unit configured to receive a request to reboot the first computing device; and host reset session resumption logic configured to store, in response to the request, the state information in a particular location in a memory of the first computing device, to initiate a reboot of the first computing device, to retrieve the state information from the particular location in memory, and to request resuming data communications over the network connection based on the retrieved state information.

Abstract: Methods and apparatus are disclosed for transparently resuming the network connection after a reset or reboot. In one aspect a data processing apparatus comprises an operating system unit configured to create and store state information comprising one or more parameters for a network connection between a first computing device and a second computing device; a management interface unit configured to receive a request to reboot the first computing device; and host reset session resumption logic configured to store, in response to the request, the state information in a particular location in a memory of the first computing device, to initiate a reboot of the first computing device, to retrieve the state information from the particular location in memory, and to request resuming data communications over the network connection based on the retrieved state information.

Abstract: Smart card functionality is implemented utilizing a security co-processor already included on a device and external memory. An internal private key is stored in NVROM on the die of the security co-processor and a private RAM, accessible by only the security co-processor, is also included. Blocks of data stored in external memory can be encrypted and decrypted using the private key. If other secret or symmetric keys are included in a block of data they are stored in clear text in the private RAM after decryption by the private internal key. The CPU can then request the security co-processor to encrypt/decrypt data using other secret or symmetric keys held in the private RAM.

Abstract: A host-daughtercard interface is pin compatible with a legacy interface but redefines a subset of pins to implement a high-bandwidth double data-rate (DDR) bus. By inspecting a cookie on the daughtercard, the host platform determines whether the daughtercard supports the DDR bus or the legacy interface, and then configures the subset of pins to implement the legacy interface or the DDR bus.