Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a apace between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surfaces, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

Abstract: An exposed die overmolded flip chip package includes a substrate. A die is flip chip mounted to an upper surface of the substrate. The package further includes a mold cap filling a space between an active surface of the die and the upper surface of the substrate. The mold cap includes a principal surface, sidewalls extending from the upper surface of the substrate to the principal surface, an annular surface coplanar with the inactive surface of the die and extending outward from a peripheral edge of the inactive surface of the die, and protruding surfaces extending between the principal surface and the annular surface. The mold cap does not cover the inactive surface of the die such that heat transfer from the die to the ambient environment is maximized and the package thickness is minimized.

Abstract: A method of using x-rays to align screen printing of flip chip using x-ray sub-assembly in a chip fabricating assembly. X-rays are directed onto a substrate having receptor pads and a printing screen having fine apertures. The substrate is aligned with the printing screen based on the detection and analysis of the real-time image generated from the x-rays passing through the substrate and printing screen. The x-ray alignment system is capable of aligning gold plated receptor pads of five microns or less and disposed upon a low light contrast ceramic (e.g., 9011 alumina) substrate with a screen printing stencil having very small apertures of less than 125 microns.

Abstract: A method of using an x-ray alignment method by replacing a Vision Camera with a commercial x-ray sub-assembly in a chip fabricating assembly. The invention aligns the gold plated receptor pads of five mils or less, disposed upon a low light contrast ceramic (9011 alumina) substrate, with a screen printing stencil having very small apertures of less than 125 microns.

Abstract: An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a conductive structure that couples a first substrate to a second substrate. The first substrate may include a chip or a module. The second substrate may include a chip carrier or a circuit card. Thus, the present invention encompasses such coupling as chip to chip carrier, chip to circuit card, and module to circuit card. The conductive structure includes a first conductive body and a second conductive body. The first conductive body is attached to the first substrate and the second conductive body is attached to the second substrate. The first conductive body may include a solder bump, while the second conductive body may include a eutectic alloy, such as a eutectic alloy lead and tin. Alternatively, the second conductive body may include a non-eutectic alloy whose melting point is below the melting point of the first conductive body.

Abstract: An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a conductive structure that couples a first substrate to a second substrate. The first substrate may include a chip or a module. The second substrate may include a chip carrier or a circuit card. Thus, the present invention encompasses such coupling as chip to chip carrier, chip to circuit card, and module to circuit card. The conductive structure includes a first conductive body and a second conductive body. The first conductive body is attached to the first substrate and the second conductive body is attached to the second substrate. The first conductive body may include a solder bump, while the second conductive body may include a eutectic alloy, such as a eutectic alloy lead and tin. Alternatively, the second conductive body may include a non-eutectic alloy whose melting point is below the melting point of the first conductive body.

Abstract: An electrical structure, and associated method of fabrication, for reducing thermally induced strain in a conductive structure that couples a first substrate to a second substrate. The first substrate may include a chip or a module. The second substrate may include a chip carrier or a circuit card. Thus, the present invention encompasses such coupling as chip to chip carrier, chip to circuit card, and module to circuit card. The conductive structure includes a first conductive body and a second conductive body. The first conductive body is attached to the first substrate and the second conductive body is attached to the second substrate. The first conductive body may include a solder bump, while the second conductive body may include a eutectic alloy, such as a eutectic alloy lead and tin. Alternatively, the second conductive body may include a non-eutectic alloy whose melting point is below the melting point of the first conductive body.

Abstract: In an apparatus for soldering/desoldering components having a nozzle with larger and smaller ends, the larger end for attaching to an exhaust for drawing a vacuum and to a supply of heated gas for at least softening solder, an insert is attached at the smaller end of the nozzle to adjust the size of that opening for receiving each of a plurality of components, fitting different inserts to different sizes of components.

Abstract: Receptor pad structures for chip carriers, and in particular, non-floating BLM C-4 receptor pads for organic chip carriers preferably utilizing eutectic solder. On the receptor pads of chip carriers, particularly in providing equal distributions of the solder so that all pad areas are equalized irrespective as the type and size of receptor pad configuration, there is a utilization of a solder mask constituted of an insulating material, and which incorporates specifically sized and shaped solder openings or windows wherein, in a particular instance, the C4 receptor pad is essentially at the intersection of a copper trace and the solder mask window. Pursuant to a particular aspect, the solder mask opening is of a polygonal configuration, whereas in other instances, as described hereinbelow, the C4 receptor pad design may be essentially of a socalled “band aid” or circular configuration in which a circular pad is located below and within a round solder mask opening or window.

Abstract: In an apparatus for soldering/desoldering components having a nozzle with larger and smaller ends, the larger end for attaching to an exhaust for drawing a vacuum and to a supply of heated gas for at least softening solder, an insert is attached at the smaller end of the nozzle to adjust the size of that opening for receiving each of a plurality of components, fitting different inserts to different sizes of components.

Abstract: Excess solder is removed from an article such as a circuit substrate or electronic component as is often required after separation of a mounted component from a substrate. A metal foil having a surface with micro-roughness is brought in contact with the solder material and heated to thereby melt the solder, allowing it to flow onto the foil surface. The foil, having the molten solder therein, is then withdrawn.

Abstract: In an apparatus for soldering/desoldering components having a nozzle with larger and smaller ends, the larger end for attaching to an exhaust for drawing a vacuum and to a supply of heated gas for at least softening solder, an insert is attached at the smaller end of the nozzle to adjust the size of that opening for receiving each of a plurality of components, fitting different inserts to different sizes of components.

Abstract: The method for soldering a chip to a substrate to form a module and then soldering the module to a circuit board includes selecting a three level hierarchy of solders by the temperature required to melt. By this method, a module can be soldered to and de-soldered from a circuit board without affecting adversely the solder between the chip and the substrate. The package formed by this method is free of faults that are caused frequently during both manufacture and service.

Abstract: The method for soldering a chip to a substrate to form a module and then soldering the module to a circuit board includes selecting a three level hierarchy of solders by the temperature required to melt. By this method, a module can be soldered to and de-soldered from a circuit board without affecting adversely the solder between the chip and the substrate. The package formed by this method is free of faults that are caused frequently during both manufacture and service.