Abstract: Disclosed is a low noise amplifier system. Included is a main amplifier having a main input coupled to a RF input and a main output connected to an RF output and an impedance amplifier having an impedance input coupled to the RF input and an impedance output coupled to the RF output, wherein the impedance amplifier is configured to provide input impedance matching to the main amplifier. The impedance amplifier also provides a first noise path that passes through the impedance amplifier such that the noise generated by the impedance amplifier is substantially out of phase with the noise that passes through a second noise path that passes through the main amplifier. A neutralization amplifier is configured to reduce parasitic capacitive loading within the first noise path.

Abstract: Disclosed is a low noise amplifier system. Included is a main amplifier having a main input coupled to a RF input and a main output connected to an RF output and an impedance amplifier having an impedance input coupled to the RF input and an impedance output coupled to the RF output, wherein the impedance amplifier is configured to provide input impedance matching to the main amplifier. The impedance amplifier also provides a first noise path that passes through the impedance amplifier such that the noise generated by the impedance amplifier is substantially out of phase with the noise that passes through a second noise path that passes through the main amplifier.

Abstract: A digital audio radio system includes a radio frequency (RF) integrated circuit (IC) and a baseband digital signal processing (DSP) IC to receive digital audio radio signals from satellites and terrestrial antennae. A serial digital interface couples data between the RF IC and the baseband DSP IC to provide a high data rate and low noise. In one embodiment, the RF IC has a single bit sigma delta modulator to convert an analog signal into a serial digital bit stream, and a low voltage differential output driver to reduce the output voltage swing of the serial digital bit stream. The DSP IC has a low voltage differential input receiver to increase the output voltage swing of the serial digital bit stream in the DSP IC, a decimator to lower the data rate of the serial digital bit stream, and a demodulator to convert the serial digital bit stream into parallel digital data samples for digital signal processing by the DSP IC.

Abstract: The invention relates to an oscillator OSC intended to provide an output signal having a frequency which is variable as a function of a tuning voltage Vtun. The oscillator OSC includes a passive part having two series-arranged variable capacitances Cs, biased by the tuning voltage Vtun, and connected to a power supply VCC via two inductances Lext, and an active part having a first transistor T1 and a second transistor T2 whose collectors are connected to the output terminals C1 and C2 of the passive part, the base of one transistor being connected to the collector of the other transistor via a coupling capacitor Cfb. According to the invention, the passive part includes two high-pass filters, each being inserted between one of the output terminals S1 or S2 and one of the variable capacitances Cs, which allows a reduction of the active part's sensitivity to low-frequency noise.