Abstract: A controller for a motor system includes an input terminal to receive a signal indicating a speed of an electric motor and a regenerative brake current interpolator to indicate a brake current to be applied to the electric motor responsive to the speed of the electric motor. Values of the brake current vary with variation of the speed of the electric motor.

Abstract: Measuring circuits including switched capacitors, and related systems, methods, and devices are disclosed. A measurement circuit includes a flying capacitor, a grounded capacitor, a first switch, a second switch, a third switch, and a fourth switch. The first switch is configured to selectively electrically connect an electrochemical cell cathode node to a first terminal of the flying capacitor. The second switch is configured to selectively electrically connect an electrochemical cell anode node to a second terminal of the flying capacitor. The third switch is configured to selectively electrically connect the first terminal of the flying capacitor to a third terminal of the grounded capacitor. The fourth switch is configured to electrically connect the second terminal of the flying capacitor to a fourth terminal of the grounded capacitor. The fourth terminal is electrically connected to the reference voltage potential node.

Abstract: Frequency shift keying (FSK) demodulation for wireless power and related systems, methods, and devices is disclosed. An apparatus for a wireless power receiver includes a timing circuit and a processing core separate from the timing circuit. The timing circuit is to obtain a timer count every predetermined number of like edges of a frequency shift keying (FSK) wireless power signal. The FSK wireless power signal is to communicate data bits. The processing core is to determine the data bits of the FSK wireless power signal responsive to the obtained timer counts.

Abstract: Measuring circuits including switched capacitors, and related systems, methods, and devices are disclosed. A measurement circuit includes a flying capacitor, a grounded capacitor, a first switch, a second switch, a third switch, and a fourth switch. The first switch is configured to selectively electrically connect an electrochemical cell cathode node to a first terminal of the flying capacitor. The second switch is configured to selectively electrically connect an electrochemical cell anode node to a second terminal of the flying capacitor. The third switch is configured to selectively electrically connect the first terminal of the flying capacitor to a third terminal of the grounded capacitor. The fourth switch is configured to electrically connect the second terminal of the flying capacitor to a fourth terminal of the grounded capacitor. The fourth terminal is electrically connected to the reference voltage potential node.

Abstract: Efficiency of a switch mode power supply (SMPS) is optimized by operating the SMPS in an asynchronous mode when current being supplied therefrom is less than a certain current value and operating the SMPS in a synchronous mode when the current being supplied therefrom is equal to or greater than the certain current value. When the SMPS is operating in the synchronous mode high-side and low-side power transistors alternately turn on and off. When the SMPS is operating in the asynchronous mode only the high-side power transistor turns on and off and the low-side power transistor remains off. When charging a battery with the SMPS discharge of the battery is eliminated when operating in the asynchronous mode at a low current output.

Abstract: Efficiency of a switch mode power supply (SMPS) is optimized by operating the SMPS in an asynchronous mode when current being supplied therefrom is less than a certain current value and operating the SMPS in a synchronous mode when the current being supplied therefrom is equal to or greater than the certain current value. When the SMPS is operating in the synchronous mode high-side and low-side power transistors alternately turn on and off. When the SMPS is operating in the asynchronous mode only the high-side power transistor turns on and off and the low-side power transistor remains off. When charging a battery with the SMPS discharge of the battery is eliminated when operating in the asynchronous mode at a low current output.