Patents by Inventor Miin Nan Yen

Miin Nan Yen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7079430
    Abstract: A semiconductor memory device having built-in error-correction capabilities, which comprises a primary array containing a plurality of memory cells; a redundancy array containing at least one replacement cell for replacing at least one defective cell in the primary array, wherein the defective cell is identified by a control signal and the control signal varies according to a defective state of the defective cell over time; and a switching circuit comprising a reprogrammable logic array that is coupled to the primary array and the redundancy array for receiving the control signal to switch a cell signal of the defective cell to the replacement cell.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: July 18, 2006
    Assignee: Macronix International Co., Ltd.
    Inventors: Miin Nan Yen, Duo Sheng
  • Publication number: 20040240282
    Abstract: A semiconductor memory device having built-in error-correction capabilities, which comprises a primary array containing a plurality of memory cells; a redundancy array containing at least one replacement cell for replacing at least one defective cell in the primary array, wherein the defective cell is identified by a control signal and the control signal varies according to a defective state of the defective cell over time; and a switching circuit comprising a reprogrammable logic array that is coupled to the primary array and the redundancy array for receiving the control signal to switch a cell signal of the defective cell to the replacement cell.
    Type: Application
    Filed: June 2, 2003
    Publication date: December 2, 2004
    Applicant: Macronix International Co., Ltd.
    Inventors: Miin Nan Yen, Duo Sheng