Abstract: According to one implementation of the present disclosure, a circuit includes: two or more metal wires, respective XOR gates coupled to each of the two or more top metal wires, a shift register having outputs coupled to the XOR gates, an OR gate configured to receive each of the outputs of the XOR gates, and a latch configured to receive an output of the OR gate and transmit an output signal corresponding to an alarm signal.

Abstract: Various implementations described herein refer to a device having base registers that receive input signals, receive a reset signal and provide first output signals based on the input signals and the reset signal. The device may have shadow registers that correspond to the base registers, wherein the shadow registers receive inverted input signals, receive an inverted reset signal and provide second output signals based on the inverted input signals and the inverted reset signal. The device may have attack detector logic that receives the first output signals from the base registers, receives the second output signals from the shadow registers and generates an alarm signal based on the first output signals and the second output signals.

Abstract: There is provided an apparatus and method, the apparatus comprising a power input and a switch isolation circuit to provide isolation between the power input and a protected switch responsive to a timing signal. The switch isolation circuit comprises a switch isolation charge store, and a buffer circuit to receive power from the switch isolation charge store and coupled between the timing signal and the protected switch. The switch isolation circuit is configured to, in response to the timing signal having the first value, operate in a powered mode in which the switch isolation charge store receives power from the power input; and, in response to the timing signal having the second value, operate in an isolation mode in which the switch isolation charge store is isolated from the power input.

Abstract: There are provided apparatuses and methods. The apparatus comprise a power input and a power output and a first isolation circuit comprising a charge store. The first isolation circuit is configured to switch between a first mode and a second mode at a switching frequency. In the first mode the charge store is coupled to the power input and is electrically isolated from an intermediate power node. In the second mode the charge store is coupled to the intermediate power node and is electrically isolated from the power input. The apparatus further comprises a second isolation circuit electrically coupled to the intermediate power node and the power output. The second isolation circuit is configured to output an output voltage at the power output. The second isolation circuit is configured to generate the output voltage by filtering the intermediate voltage signal to reduce signal components at the switching frequency.

Abstract: A system with fault injection attack detection can include a circuit block; at least one independent power network; a detector coupled to the at least one independent power network to detect a change in a power characteristic of the independent power network; and sensors coupled to the at least one independent power network and located in an active layer of a chip with the circuit block. The sensors are responsive to at least one type of fault injection attack. In some cases, the sensors can be inverters.

Abstract: An electronic system can include a charge storage device controllably connected to a voltage source; a protected circuit block controllably connected to the charge storage device for receiving a voltage supply from the charge storage device, the protected circuit block operating via an operating clock signal; a voltage detector coupled to the voltage supply of the protected circuit block; a comparator coupled to an output of the voltage detector; and a countermeasure processor coupled to receive an alert signal from an output of the comparator. The voltage at the voltage supply is related to the frequency of the operating clock and a frequency manipulation attack is detected by monitoring a difference between the voltage supply and a comparison voltage.

Abstract: An apparatus has an input interface for receiving an input clock signal, and a plurality N of clock divider circuits, each clock divider circuit generating a corresponding monitored clock signal by dividing the input clock signal by N. Each clock divider circuit is arranged, when generating a leading edge of each clock cycle of its corresponding monitored clock signal, to use a leading edge of a different clock cycle of the input clock signal to the clock cycle of the input clock signal used by any other of the clock divider circuits. Analysis circuitry provided in association with each clock divider circuit produces a width indication for each clock cycle of the corresponding monitored clock signal. Alarm generation circuitry then triggers an alarm signal when, for any of the monitored clock signals, a variation in the width indication is detected over multiple clock cycles of that monitored clock signal.

Abstract: An electronic system can include a charge storage device controllably connected to a voltage source; a protected circuit block controllably connected to the charge storage device for receiving a voltage supply from the charge storage device, the protected circuit block operating via an operating clock signal; a voltage detector coupled to the voltage supply of the protected circuit block; a comparator coupled to an output of the voltage detector; and a countermeasure processor coupled to receive an alert signal from an output of the comparator. The voltage at the voltage supply is related to the frequency of the operating clock and a frequency manipulation attack is detected by monitoring a difference between the voltage supply and a comparison voltage.

Abstract: A sensor system includes a sensor having a charge storage device controllably connected to a voltage source under control of a signal under test; and a readout circuit coupled to the charge storage device to determine whether the pulse width of the signal under test has changed greater than a threshold amount according to a voltage at the charge storage device. In some cases, the determination of whether the pulse width of the signal under test has changed includes determining whether the voltage satisfies a condition with respect to a comparison voltage. In some cases, the determination of whether the pulse width of the signal under test has changed is based on a propagation delay through a delay chain, where the propagation delay is dependent on the voltage.

Abstract: A system with tamper detection can include at least one ring oscillator and a detection circuit coupled to the at least one ring oscillator to detect change in frequency greater than a tolerance. Each ring oscillator can include a plurality of inverters where at least one intermediate node coupling an output of one of the plurality of inverters and an input to another of the plurality of inverters is a sensing node of a plurality of sensing nodes for the system. Outputs from two or more ring oscillators can be compared and a signal to initiate a countermeasure response can be generated when the outputs have a difference greater than a tolerance value.

Abstract: A system with circuit alteration detection can include a shield in at least one metal layer over an integrated circuit, and a detector coupled to the shield to detect a change in impedance characteristics of one or more shield lines of the shield due to physical alteration of the shield. The shield lines can be arranged in one or more metal layers and cover an area with shape arrangements such as parallel lines and serpentines. The detector can include one or more comparators to detect a difference in impedance of more than a tolerance value. An appropriate countermeasure response can be initiated upon detection of the difference in impedance.

Abstract: A sensor system can include a sensor having a charge storage device controllably connected to a voltage source under control of a signal under test; and a readout circuit coupled to the charge storage device to determine whether the pulse width of the signal under test has changed greater than a threshold amount according to a voltage at the charge storage device. In some cases, the determination of whether the pulse width of the signal under test has changed can include determining whether the voltage satisfies a condition with respect to a comparison voltage. In some cases, the determination of whether the pulse width of the signal under test has changed can be based on a propagation delay through a delay chain, where the propagation delay is dependent on the voltage.

Abstract: A system incorporating a power distribution for functional circuit blocks can include a functional circuit block comprising two or more sub-circuits; a power line comprising at least two segments, a first sub-circuit of the two or more sub-circuits being coupled to a first segment of the at least two segments, and a second sub-circuit of the two or more sub-circuits being coupled to a second segment of the at least two segments; and at least one power delivery circuit (PDC) coupled to the power line at a location to create an electromagnetic flux on two adjacent segments of the at least two segments that is in opposite directions. The PDCs can be arranged coupled to the power line with a number and at locations optimized for mitigating electromagnetic emissions on the power line.

Abstract: A system with tamper detection can include at least one ring oscillator and a detection circuit coupled to the at least one ring oscillator to detect change in frequency greater than a tolerance. Each ring oscillator can include a plurality of inverters where at least one intermediate node coupling an output of one of the plurality of inverters and an input to another of the plurality of inverters is a sensing node of a plurality of sensing nodes for the system. Outputs from two or more ring oscillators can be compared and a signal to initiate a countermeasure response can be generated when the outputs have a difference greater than a tolerance value.

Abstract: A system with circuit alteration detection can include a shield in at least one metal layer over an integrated circuit, and a detector coupled to the shield to detect a change in impedance characteristics of one or more shield lines of the shield due to physical alteration of the shield. The shield lines can be arranged in one or more metal layers and cover an area with shape arrangements such as parallel lines and serpentines. The detector can include one or more comparators to detect a difference in impedance of more than a tolerance value. An appropriate countermeasure response can be initiated upon detection of the difference in impedance.

Abstract: Briefly, embodiments of claimed subject matter relate to controlling a voltage across a circuit element utilized in a pre-driver for a bidirectional communications bus. In embodiments, a voltage control circuit may be utilized to reduce electrical stress across a capacitor coupled to the pre-driver to the communications bus. The voltage control circuit may operate to provide a voltage to a middle point between two capacitors, of a plurality of capacitors, which may operate to limit voltage across one or more capacitors to below a predetermined limit.

Abstract: A system incorporating a power distribution for functional circuit blocks can include a functional circuit block comprising two or more sub-circuits; a power line comprising at least two segments, a first sub-circuit of the two or more sub-circuits being coupled to a first segment of the at least two segments, and a second sub-circuit of the two or more sub-circuits being coupled to a second segment of the at least two segments; and at least one power delivery circuit (PDC) coupled to the power line at a location to create an electromagnetic flux on two adjacent segments of the at least two segments that is in opposite directions. The PDCs can be arranged coupled to the power line with a number and at locations optimized for mitigating electromagnetic emissions on the power line.