Patents by Inventor Mikas Remeika

Mikas Remeika has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10797640
    Abstract: A system and method for assessing performance of a plurality of perovskite optoelectronic devices are disclosed. The system comprises a chamber, a light source, a switch board for allowing selection of a device among a plurality of devices in the chamber for measurement; a DC voltage supply for applying voltage to the device, a source/measure unit (SMU) for measuring current of the device; and a computer implemented with a software program including computer executable instructions to control at least the SMU, the DC voltage supply, the switch board, and the light source. The computer-implemented method for the performance assessment by using the system includes obtaining at least one of first current-versus-voltage (I-V) data according to a first procedure and second I-V data according to a second procedure for analyzing hysteresis behavior of the device.
    Type: Grant
    Filed: May 29, 2017
    Date of Patent: October 6, 2020
    Assignee: OKINAWA INSTITUTE OF SCIENCE AND TECHNOLOGY SCHOOL CORPORATION
    Inventors: Yabing Qi, Luis Katsuya Ono, Mikas Remeika, Sonia Ruiz Raga
  • Publication number: 20190131926
    Abstract: A system and method for assessing performance of a plurality of perovskite optoelectronic devices are disclosed. The system comprises a chamber, a light source, a switch board for allowing selection of a device among a plurality of devices in the chamber for measurement; a DC voltage supply for applying voltage to the device, a source/measure unit (SMU) for measuring current of the device; and a computer implemented with a software program including computer executable instructions to control at least the SMU, the DC voltage supply, the switch board, and the light source. The computer-implemented method for the performance assessment by using the system includes obtaining at least one of first current-versus-voltage (I-V) data according to a first procedure and second I-V data according to a second procedure for analyzing hysteresis behavior of the device.
    Type: Application
    Filed: May 29, 2017
    Publication date: May 2, 2019
    Applicant: OKINAWA INSTITUTE OF SCIENCE AND TECHNOLOGY SCHOOL CORPORATION
    Inventors: Yabing Qi, Luis Katsuya Ono, Mikas Remeika, Sonia Ruiz Raga
  • Patent number: 7749922
    Abstract: The present invention provides structures and devices comprising conductive segments and conductance constricting segments of a nanowire, such as metallic, superconducting or semiconducting nanowire. The present invention provides structures and devices comprising conductive nanowire segments and conductance constricting nanowire segments having accurately selected phases including crystalline and amorphous states, compositions, morphologies and physical dimensions, including selected cross sectional dimensions, shapes and lengths along the length of a nanowire. Further, the present invention provides methods of processing nanowires capable of patterning a nanowire to form a plurality of conductance constricting segments having selected positions along the length of a nanowire, including conductance constricting segments having reduced cross sectional dimensions and conductance constricting segments comprising one or more insulating materials such as metal oxides.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: July 6, 2010
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Alexey Bezryadin, Mikas Remeika
  • Publication number: 20070040191
    Abstract: The present invention provides structures and devices comprising conductive segments and conductance constricting segments of a nanowire, such as metallic, superconducting or semiconducting nanowire. The present invention provides structures and devices comprising conductive nanowire segments and conductance constricting nanowire segments having accurately selected phases including crystalline and amorphous states, compositions, morphologies and physical dimensions, including selected cross sectional dimensions, shapes and lengths along the length of a nanowire. Further, the present invention provides methods of processing nanowires capable of patterning a nanowire to form a plurality of conductance constricting segments having selected positions along the length of a nanowire, including conductance constricting segments having reduced cross sectional dimensions and conductance constricting segments comprising one or more insulating materials such as metal oxides.
    Type: Application
    Filed: May 4, 2006
    Publication date: February 22, 2007
    Applicant: The Board of Trustees of the University of Illinois
    Inventors: Alexey Bezryadin, Mikas Remeika