Abstract: A color palette selects a master clock from plural clock signals received at clock input terminals in response to a master clock selection control word received at control data terminals. A circuit forms a plurality of divided down clock signals from selected divide ratios of the master clock. A circuit selects a shift clock from among the divided down clock signals in response to at least some bits of an output clock selection control word received at the control data terminals. A circuit selectively enables and disables the shift clock in response to blanking data. A circuit selects a video clock from among the divided down clock signals in response to at least some bits of the output clock selection control word. A circuit synchronizes multiple bit words of color code received at color code input terminals with the master clock. A circuit outputs at least one memory recall address in response to receiving each multiple bit word of color code.

Abstract: The graphics data processing apparatus performs graphic data processing operations by combining data from two image arrays in accordance with a predetermined operation. This raster operation involves forming an image array having a pixel color code for each pixel of the combined image array formed from a combination of the color codes of corresponding pixels of the source and destination image arrays. The present invention includes a pair of data registers which define the difference in memory address between vertically adjacent pixels for the respective image arrays. This difference in memory address between vertically adjacent pixels is called the pitch and corresponds generally to the width of the display image in address space when any horizontal blanking interval is taken into account. In the present invention such raster operations can be performed on data which is stored in formats of differing pitch.