Patents by Inventor Mike Chang
Mike Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170340220Abstract: A physiological detection method includes the following steps. A detection portion of a human body is detected to obtain a detection signal. Then, the detection signal is processed to output a digital physiological signal. The digital physiological signal is received to calculate and obtain first information and second information related to feature points thereof. Then, a ratio of the second information to the first information is calculated to obtain a physiological condition index. The digital physiological signal includes pulse waves generated according to a time sequence. The feature points of the digital physiological signal include a wave pulse peak and a foot point located at a forepart of the rising edge of the wave. In addition, a physiological detection device is also introduced.Type: ApplicationFiled: September 27, 2016Publication date: November 30, 2017Applicant: Leadtek Research Inc.Inventors: Po-Chun Hsu, Cheng-Jun Chuang, Mike Chang, Kuo-Hung Cheng, Jason Yang, Yu-Hsiang Lin, Chao-Jung Yu
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Patent number: 9040356Abstract: A semiconductor package includes a leadframe which is cup-shaped and holds a semiconductor die. The leadframe is in electrical contact with a terminal on one side of the die, and the leads of the leadframe are bent in such a way that portions of the leads are coplanar with the other side of the die, which also contains one or more terminals. A plastic capsule is formed around the leadframe and die.Type: GrantFiled: June 19, 2009Date of Patent: May 26, 2015Assignee: Vishay-SiliconixInventors: Mike Chang, King Owyang, Yueh-Se Ho, Mohammed Kasem, Lixiong Luo, Wei-Bing Chu
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Patent number: 8169062Abstract: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the bonding metal area (101a) increases the number of interconnections between the metal area (101a) and the die (100) to reduce the electric resistance and inductance. Furthermore, the surface area of the external terminals radiating from the package's plastic body (106) is increased if not maximized so that heat can be dissipated quicker and external terminal resistances reduced. The integrated circuit is applicable for MOSFET devices and the bonding metal area (101a) is used for the source terminal (101). The bonding metal area may have a “L” shape, a “C” shape, a “J” shape, an “I” shape or any combination thereof.Type: GrantFiled: May 24, 2011Date of Patent: May 1, 2012Assignee: Alpha and Omega Semiconductor IncorporatedInventors: Leeshawn Luo, Anup Bhalla, Yueh-Se Ho, Sik K. Lui, Mike Chang
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Patent number: 8067822Abstract: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the bonding metal area (101a) increases the number of interconnections between the metal area (101a) and the die (100) to reduce the electric resistance and inductance. Furthermore, the surface area of the external terminals radiating from the package's plastic body (106) is increased if not maximized so that heat can be dissipated quicker and external terminal resistances reduced. The integrated circuit is applicable for MOSFET devices and the bonding metal area (101a) is used for the source terminal (101). The bonding metal area may have a “L” shape, a “C” shape, a “J” shape, an “I” shape or any combination thereof.Type: GrantFiled: June 23, 2008Date of Patent: November 29, 2011Assignee: Alpha and Omega Semiconductor IncorporatedInventors: Leeshawn Luo, Anup Bhalla, Yueh-Se Ho, Sik K. Lui, Mike Chang
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Publication number: 20110221005Abstract: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the s bonding metal area (101a) increases the number of interconnections between the metal area (101a) and the die (100) to reduce the electric resistance and inductance. Furthermore, the surface area of the external terminals radiating from the package's plastic body (106) is increased if not maximized so that heat can be dissipated quicker and external terminal, resistances reduced. The integrated circuit is applicable for MOSFET devices and the bonding metal area (101a) is used for the source terminal (101). The bonding metal area may have a “L” shape, a “C” shape, a “J” shape, an “I” shape or any combination thereof.Type: ApplicationFiled: May 24, 2011Publication date: September 15, 2011Inventors: Leeshawn Luo, Anup Bhalla, Yueh-Se Ho, Sik K. Lui, Mike Chang
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Patent number: 7863995Abstract: A transient voltage suppressing (TVS) circuit with uni-directional blocking and symmetric bi-directional blocking capabilities integrated with an electromagnetic interference (EMI) filter supported on a semiconductor substrate of a first conductivity type. The TVS circuit integrated with the EMI filter further includes a ground terminal disposed on the surface for the symmetric bi-directional blocking structure and at the bottom of the semiconductor substrate for the uni-directional blocking structure and an input and an output terminal disposed on a top surface with at least a Zener diode and a plurality of capacitors disposed in the semiconductor substrate to couple the ground terminal to the input and output terminals with a direct capacitive coupling without an intermediate floating body region.Type: GrantFiled: April 1, 2008Date of Patent: January 4, 2011Assignee: Alpha & Omega Semiconductor Ltd.Inventors: Moses Ho, Madhur Bobde, Mike Chang, Limin Weng
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Publication number: 20090256246Abstract: A semiconductor package includes a leadframe which is cup-shaped and holds a semiconductor die. The leadframe is in electrical contact with a terminal on one side of the die, and the leads of the leadframe are bent in such a way that portions of the leads are coplanar with the other side of the die, which also contains one or more terminals. A plastic capsule is formed around the leadframe and die.Type: ApplicationFiled: June 19, 2009Publication date: October 15, 2009Applicant: VISHAY-SILICONIXInventors: Mike Chang, King Owyang, Yueh-Se Ho, Y. Mohammed Kasem, Lixiong Luo, Wei-Bing Chu
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Patent number: 7595547Abstract: A semiconductor package includes a leadframe which is cup-shaped and holds a semiconductor die. The leadframe is in electrical contact with a terminal on one side of the die, and the leads of the leadframe are bent in such a way that portions of the leads are coplanar with the other side of the die, which also contains one or more terminals. A plastic capsule is formed around the leadframe and die.Type: GrantFiled: June 13, 2005Date of Patent: September 29, 2009Assignee: Vishay-SiliconixInventors: Mike Chang, King Owyang, Yueh-Se Ho, Y. Mohammed Kasem, Lixiong Luo, Wei-Bing Chu
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Publication number: 20090014853Abstract: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the bonding metal area (101a) increases the number of interconnections between the metal area (101a) and the die (100) to reduce the electric resistance and inductance. Furthermore, the surface area of the external terminals radiating from the package's plastic body (106) is increased if not maximized so that heat can be dissipated quicker and external terminal resistances reduced. The integrated circuit is applicable for MOSFET devices and the bonding metal area (101a) is used for the source terminal (101). The bonding metal area may have a “L” shape, a “C” shape, a “J” shape, an “I” shape or any combination thereof.Type: ApplicationFiled: June 23, 2008Publication date: January 15, 2009Inventors: Leeshawn Luo, Anup Bhalla, Yueh-Se Ho, Sik K. Lui, Mike Chang
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Publication number: 20080310065Abstract: A transient voltage suppressing (TVS) circuit with uni-directional blocking and symmetric bi-directional blocking capabilities integrated with an electromagnetic interference (EMI) filter supported on a semiconductor substrate of a first conductivity type. The TVS circuit integrated with the EMI filter further includes a ground terminal disposed on the surface for the symmetric bi-directional blocking structure and at the bottom of the semiconductor substrate for the uni-directional blocking structure and an input and an output terminal disposed on a top surface with at least a Zener diode and a plurality of capacitors disposed in the semiconductor substrate to couple the ground terminal to the input and output terminals with a direct capacitive coupling without an intermediate floating body region.Type: ApplicationFiled: April 1, 2008Publication date: December 18, 2008Inventors: Moses Ho, Madhur Bobde, Mike Chang, Limin Weng
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Patent number: 7391100Abstract: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the bonding metal area (101a) increases the number of interconnections between the metal area (101a) and the die (100) to reduce the electric resistance and inductance. Furthermore, the surface area of the external terminals radiating from the package's plastic body (106) is increased if not maximized so that heat can be dissipated quicker and external terminal resistances reduced. The integrated circuit is applicable for MOSFET devices and the bonding metal area (101a) is used for the source terminal (101). The bonding metal area may have a “L” shape, a “C” shape, a “J” shape, an “I” shape or any combination thereof.Type: GrantFiled: October 25, 2004Date of Patent: June 24, 2008Assignee: Alpha & Omega Semiconductor LimitedInventors: Leeshawn Luo, Anup Bhalla, Yueh-Se Ho, Sik K. Lui, Mike Chang
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Patent number: 7310206Abstract: A thin film magnetic read/write head for use in magnetic data storage systems to enable writing of data to a magnetic data storage medium with the assistance of laser heating. The read/write head allows magnetic reading of data from the storage medium, and thermally assisted magnetic writing of data on the storage medium. A waveguide is provided in a write gap in the form of an optical circuit having a plurality of inputs and a single output at the air bearing surface (ABS) for concentrating laser light used for heating the storage medium during the write operation. The thermally assisted magnetic writing improves the thermal stability of the recorded data and usefulness thereof throughout a wide temperature range.Type: GrantFiled: December 28, 2004Date of Patent: December 18, 2007Assignee: SAE Magnetics (H.K.) Ltd.Inventors: Cheng Yih Liu, Mike Chang, Takehiro Kamigama
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Publication number: 20060143635Abstract: A thin film magnetic read/write head for use in magnetic data storage systems to enable writing of data to a magnetic data storage medium with the assistance of laser heating. The read/write head allows magnetic reading of data from the storage medium, and thermally assisted magnetic writing of data on the storage medium. A waveguide is provided in a write gap in the form of an optical circuit having a plurality of inputs and a single output at the air bearing surface (ABS) for concentrating laser light used for heating the storage medium during the write operation. The thermally assisted magnetic writing improves the thermal stability of the recorded data and usefulness thereof throughout a wide temperature range.Type: ApplicationFiled: December 28, 2004Publication date: June 29, 2006Applicant: SAE Magnetics (H.K.) Ltd.Inventors: Cheng Liu, Mike Chang, Takehiro Kamigama
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Publication number: 20060017141Abstract: A semiconductor package including a relatively thick lead frame having a plurality of leads and a first lead frame pad, the first lead frame pad including a die coupled thereto, bonding wires connecting the die to the plurality of leads, the bonding wires being aluminum, and a resin body encapsulating the die, bonding wires and at least a portion of the lead frame.Type: ApplicationFiled: July 20, 2004Publication date: January 26, 2006Inventors: Leeshawn Luo, Anup Bhalla, Sik Lui, Yueh-Se Ho, Mike Chang, Xiao Zhang
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Publication number: 20050280133Abstract: A semiconductor package and method of assembling a semiconductor package is disclosed. The semiconductor package includes a first device mounted on a leadframe and a second device mounted on the leadframe. The leadframe has leads extending to the exterior of the package. An anvil may be used to mount a device on the package. The anvil may include two side portions to support the leads of the package, two end portions connected to the two side portions, and a cutout region.Type: ApplicationFiled: June 21, 2004Publication date: December 22, 2005Inventors: Leeshawn Luo, Anup Bhalla, Sik Lui, Yueh-Se Ho, Mike Chang, Xiao Zhang
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Publication number: 20050248496Abstract: An antenna mount for a mobile phone cell station has a stationary base and a rotating base with an antenna. The rotating base is mounted rotatably on the stationary base. The stationary base has a motor and a horizontal gear set, and the rotating base has a motor and a vertical gear set. The motors are operated and controlled remotely. The direction of the antenna can be controlled remotely, and keeps technicians from being subjected to the hazardous environment required to manually adjust conventional mobile phone cell station antennas.Type: ApplicationFiled: May 10, 2004Publication date: November 10, 2005Inventors: Michael Chen, Dixie Tsao, Mike Chang
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Publication number: 20050145996Abstract: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the bonding metal area (101a) increases the number of interconnections between the metal area (101a) and the die (100) to reduce the electric resistance and inductance. Furthermore, the surface area of the external terminals radiating from the package's plastic body (106) is increased if not maximized so that heat can be dissipated quicker and external terminal resistances reduced. The integrated circuit is applicable for MOSFET devices and the bonding metal area (101a) is used for the source terminal (101). The bonding metal area may have a “L” shape, a “C” shape, a “J” shape, an “I” shape or any combination thereof.Type: ApplicationFiled: October 25, 2004Publication date: July 7, 2005Inventors: Leeshawn Luo, Anup Bhalla, Yueh-Se Ho, Sik Lui, Mike Chang
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Patent number: 6909170Abstract: A semiconductor package includes a leadframe which is cup-shaped and holds a semiconductor die. The leadframe is in electrical contact with a terminal on one side of the die, and the leads of the leadframe are bent in such a way that portions of the leads are coplanar with the other side of the die, which also contains one or more terminals. A plastic capsule is formed around the leadframe and die.Type: GrantFiled: November 7, 2002Date of Patent: June 21, 2005Assignee: Siliconix IncorporatedInventors: Mike Chang, King Owyang, Yueh-Se Ho, Y. Mohammed Kasem, Lixiong Luo, Wei-Bing Chu
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Publication number: 20050127532Abstract: A semiconductor package includes a lead frame having a plurality of leads and a lead frame pad, the lead frame pad including a die coupled thereto, at least one of the plurality of leads having an external portion sloped upwards relative to a bottom surface of the package, metal connectors connecting the die to the plurality of leads, and a resin body encapsulating the die, metal connectors and at least a portion of the lead frame.Type: ApplicationFiled: December 9, 2003Publication date: June 16, 2005Inventors: Leeshawn Luo, Anup Bhalla, Sik Lui, Yueh-Se Ho, Mike Chang, Xiao Zhang
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Patent number: 6841852Abstract: A semiconductor integrated circuit package having a leadframe (108) that includes a leadframe pad (103a) disposed under a die (100) and a bonding metal area (101a) that is disposed over at least two adjacent sides of the die. The increase in the bonding metal area (101a) increases the number of interconnections between the metal area (101a) and the die (100) to reduce the electric resistance and inductance. Furthermore, the surface area of the external terminals radiating from the package's plastic body (106) is increased if not maximized so that heat can be dissipated quicker and external terminal resistances reduced. The integrated circuit is applicable for MOSFET devices and the bonding metal area (101a) is used for the source terminal (101). The bonding metal area may have a “L” shape, a “C” shape, a “J” shape, an “I” shape or any combination thereof.Type: GrantFiled: July 2, 2002Date of Patent: January 11, 2005Inventors: Leeshawn Luo, Anup Bhalla, Yueh-Se Ho, Sik K. Lui, Mike Chang