Patents by Inventor Mike de la Garrigue

Mike de la Garrigue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080307150
    Abstract: There is disclosed a bus optimization technique. Pursuant to the bus optimization technique, the output buffer and output logic are removed from port units of a switch and are included with a control matrix in the switch. Data units received in a first port unit of a plurality of port units are provided to a control matrix. The control matrix evaluates when to send the data unit to a second port unit. No output decisions are made in the second port unit.
    Type: Application
    Filed: August 21, 2008
    Publication date: December 11, 2008
    Inventors: Heath Stewart, Chris Haywood, Mike De la Garrigue, Nadim Shaikli, Ken Wong, Bao Vuong, Thomas Reiner, Adam Rappoport
  • Patent number: 7426602
    Abstract: There is disclosed a bus optimization technique. Pursuant to the bus optimization technique, the output buffer and output logic are removed from port units of a switch and are included with a control matrix in the switch. Data units received in a first port unit of a plurality of port units are provided to a control matrix. The control matrix evaluates when to send the data unit to a second port unit. No output decisions are made in the second port unit.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: September 16, 2008
    Assignee: Topside Research, LLC
    Inventors: Heath Stewart, Chris Haywood, Mike de la Garrigue, Nadim Shaikli, Ken Wong, Bao Vuong, Thomas Reiner, Adam Rappoport