Patents by Inventor Mike Greenwood

Mike Greenwood has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7496997
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.
    Type: Grant
    Filed: January 25, 2006
    Date of Patent: March 3, 2009
    Assignee: Intel Corporation
    Inventors: Aaron J. Steyskal, Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood
  • Publication number: 20060145360
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.
    Type: Application
    Filed: January 25, 2006
    Publication date: July 6, 2006
    Inventors: Aaron Steyskal, Tao Liu, Steve Schivelev, Peir Chu, Mike Greenwood
  • Patent number: 7042702
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: May 9, 2006
    Assignee: Intel Corporation
    Inventors: Aaron J. Steyskal, Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood
  • Patent number: 7030460
    Abstract: A user-selectable integrated circuit capacitance apparatus may include first and second electrodes defining a first fractal geometry, along with second and third electrodes defining a second fractal geometry. A dielectric may be located adjacent to the first and third electrodes. A method of fabricating the apparatus may include selecting a dielectric layer, forming the first and second electrodes so as to define the first fractal geometry on the dielectric layer, and then forming third and fourth electrodes so as to define a second fractal geometry on the dielectric layer. A circuit package may include external package connections connected to the electrodes of the apparatus. A system may include the apparatus coupled to a wireless transceiver by way of a power supply trace.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: April 18, 2006
    Assignee: Intel Corporation
    Inventors: Peir Chu, Steve Schiveley, Aaron J. Steyskal, Mike Greenwood, Tao Liu
  • Publication number: 20050128677
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball-and-lead configuration is coupled to the foil and extends from the case.
    Type: Application
    Filed: December 15, 2003
    Publication date: June 16, 2005
    Inventors: Aaron Steyskal, Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood
  • Patent number: 6862784
    Abstract: A method of fabricating a capacitor provides for coupling a ball grid array (BGA) lead configuration to a foil and disposing the foil within a case. The BGA lead configuration extends from the case.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: March 8, 2005
    Assignee: Intel Corporation
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
  • Patent number: 6785118
    Abstract: A capacitor having a plurality of layers with at least one layer including a plurality of electrodes is described. In an embodiment, the electrodes are elongate. The plurality of electrodes includes a plurality of first polarity electrodes and a plurality of second polarity electrodes. In an embodiment, pairs of electrodes are formed by twisting one first polarity electrode and one second polarity electrode together. In an embodiment, first polarity electrodes and second polarity electrodes are woven together in each layer.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: August 31, 2004
    Assignee: Intel Corporation
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron J. Steyskal
  • Patent number: 6751087
    Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.
    Type: Grant
    Filed: February 24, 2003
    Date of Patent: June 15, 2004
    Assignee: Intel Corporation
    Inventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu
  • Patent number: 6704187
    Abstract: A termination assembly for a capacitor provides controlled ESR and ESL. First and second termination elements are attached to first and second foils to provide terminal connections. The first and second foils are wound into a cylinder such that the first and second termination elements form a shape within the cylinder and are spaced apart by a first distance. First and second leads are extending from the termination elements, respectively, such that the first and second leads are spaced apart by a second distance different from the first distance.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: March 9, 2004
    Assignee: Intel Corporation
    Inventors: Steve Schiveley, Mike Greenwood, Tao Liu, Peir Chu, Aaron Steyskal
  • Publication number: 20040007759
    Abstract: A user-selectable integrated circuit capacitance apparatus may include first and second electrodes defining a first fractal geometry, along with second and third electrodes defining a second fractal geometry. A dielectric may be located adjacent to the first and third electrodes. A method of fabricating the apparatus may include selecting a dielectric layer, forming the first and second electrodes so as to define the first fractal geometry on the dielectric layer, and then forming third and fourth electrodes so as to define a second fractal geometry on the dielectric layer. A circuit package may include external package connections connected to the electrodes of the apparatus. A system may include the apparatus coupled to a wireless transceiver by way of a power supply trace.
    Type: Application
    Filed: July 11, 2002
    Publication date: January 15, 2004
    Applicant: Intel Corporation
    Inventors: Peir Chu, Steve Schiveley, Aaron J. Steyskal, Mike Greenwood, Tao Liu
  • Publication number: 20030137800
    Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.
    Type: Application
    Filed: February 24, 2003
    Publication date: July 24, 2003
    Applicant: Intel Corporation
    Inventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu
  • Patent number: 6590762
    Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.
    Type: Grant
    Filed: August 6, 2001
    Date of Patent: July 8, 2003
    Assignee: Intel Corporation
    Inventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu
  • Publication number: 20030103317
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball grid array (BGA) lead configuration is coupled to the foil and extends from the case.
    Type: Application
    Filed: January 16, 2003
    Publication date: June 5, 2003
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
  • Publication number: 20030058603
    Abstract: A termination assembly for a capacitor provides controlled ESR and ESL. First and second termination elements are attached to first and second foils to provide terminal connections. The first and second foils are wound into a cylinder such that the first and second termination elements form a shape within the cylinder and are spaced apart by a first distance. First and second leads are extending from the termination elements, respectively, such that the first and second leads are spaced apart by a second distance different from the first distance.
    Type: Application
    Filed: September 24, 2001
    Publication date: March 27, 2003
    Inventors: Steve Schiveley, Mike Greenwood, Tao Liu, Peir Chu, Aaron Steyskal
  • Patent number: 6529365
    Abstract: A wound capacitor has a lead configuration that enables enhanced control over equivalent series resistance (ESR) and equivalent series inductance (ESL). The capacitor has a case and a wound foil disposed within the case. A ball grid array (BGA) lead configuration is coupled to the foil and extends from the case.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: March 4, 2003
    Assignee: Intel Corporation
    Inventors: Tao Liu, Steve Schiveley, Peir Chu, Mike Greenwood, Aaron Steyskal
  • Patent number: 6519136
    Abstract: A dielectric hybrid material and a dielectric hybrid capacitor.
    Type: Grant
    Filed: March 29, 2002
    Date of Patent: February 11, 2003
    Assignee: Intel Corporation
    Inventors: Peir Chu, Steve Schiveley, Aaron J. Steyskal, Mike Greenwood, Tao Liu
  • Publication number: 20030026058
    Abstract: The present invention provides a capacitor having a plurality of layers of aluminum foil connected to a first electrical terminal of the capacitor and another plurality of layers of aluminum foil connected to a second electrical terminal of the capacitor. The layers of aluminum foil are separated by a polymer such as a conductive organic polymer, so that each layer of polymer physically separates a layer of aluminum foil connected to the first terminal from a layer of aluminum foil connected to the second terminal. In some such embodiments the aluminum foil may be etched to provide greater surface area and capacitance, and also may be oxidized to form a dielectric layer.
    Type: Application
    Filed: August 6, 2001
    Publication date: February 6, 2003
    Applicant: Intel Corporation
    Inventors: Mike Greenwood, Steve Schiveley, Aaron J. Steyskal, Peir Chu, Tao Liu