Patents by Inventor Mike Pelham

Mike Pelham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Layout patterns for deep well region to facilitate routing body-bias voltage
    Patent number: 7863688
    Abstract: Layout patterns for the deep well region to facilitate routing the body-bias voltage in a semiconductor device are provided and described. The layout patterns include a diagonal sub-surface mesh structure, an axial sub-surface mesh structure, a diagonal sub-surface strip structure, and an axial sub-surface strip structure. A particular layout pattern is selected for an area of the semiconductor device according to several factors.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: January 4, 2011
    Inventors: Mike Pelham, James B. Burr
  • LAYOUT PATTERNS FOR DEEP WELL REGION TO FACILITATE ROUTING BODY-BIAS VOLTAGE
    Publication number: 20100072575
    Abstract: Layout patterns for the deep well region to facilitate routing the body-bias voltage in a semiconductor device are provided and described. The layout patterns include a diagonal sub-surface mesh structure, an axial sub-surface mesh structure, a diagonal sub-surface strip structure, and an axial sub-surface strip structure. A particular layout pattern is selected for an area of the semiconductor device according to several factors.
    Type: Application
    Filed: November 30, 2009
    Publication date: March 25, 2010
    Inventors: Mike Pelham, James B. Burr
  • Layout pattern for deep well region to facilitate routing body-bias voltage
    Patent number: 7645664
    Abstract: Layout patterns for the deep well region to facilitate routing the body-bias voltage in a semiconductor device are provided and described. The layout patterns include a diagonal sub-surface mesh structure, an axial sub-surface mesh structure, a diagonal sub-surface strip structure, and an axial sub-surface strip structure. A particular layout pattern is selected for an area of the semiconductor device according to several factors.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: January 12, 2010
    Inventors: Mike Pelham, James B. Burr
  • Sub-surface region with diagonal gap regions
    Patent number: 7608897
    Abstract: Diagonal deep well region for routing the body-bias voltage for MOSFETS in surface well regions is provided and described.
    Type: Grant
    Filed: January 28, 2008
    Date of Patent: October 27, 2009
    Inventors: Mike Pelham, James B. Burr
  • Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions
    Publication number: 20080121941
    Abstract: Diagonal deep well region for routing the body-bias voltage for MOSFETS in surface well regions is provided and described.
    Type: Application
    Filed: January 28, 2008
    Publication date: May 29, 2008
    Inventors: Mike Pelham, James B. Burr
  • Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions
    Patent number: 7323367
    Abstract: Diagonal deep well region for routing the body-bias voltage for MOSFETS in surface well regions is provided and described.
    Type: Grant
    Filed: May 1, 2007
    Date of Patent: January 29, 2008
    Assignee: Transmeta Corporation
    Inventors: Mike Pelham, James B. Burr
  • Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions
    Patent number: 7211478
    Abstract: Diagonal deep well region for routing the body-bias voltage for MOSFETS in surface well regions is provided and described.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: May 1, 2007
    Assignee: Transmeta Corporation
    Inventors: Mike Pelham, James B. Burr
  • Layout patterns for deep well region to facilitate routing body-bias voltage
    Patent number: 7098512
    Abstract: Layout patterns for the deep well region to facilitate routing the body-bias voltage in a semiconductor device are provided and described. The layout patterns include a diagonal sub-surface mesh structure, an axial sub-surface mesh structure, a diagonal sub-surface strip structure, and an axial sub-surface strip structure. A particular layout pattern is selected for an area of the semiconductor device according to several factors.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: August 29, 2006
    Assignee: Transmeta Corporation
    Inventors: Mike Pelham, James B. Burr
  • Diagonal deep well region for routing body-bias voltage for MOSFETS in surface well regions
    Patent number: 6936898
    Abstract: Diagonal deep well region for routing the body-bias voltage for MOSFETS in surface well regions is provided and described.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: August 30, 2005
    Assignee: Transmeta Corporation
    Inventors: Mike Pelham, James B. Burr
  • Diagonal deep well region for routing body-bias voltage for mosfets in surface well regions
    Publication number: 20040124475
    Abstract: Diagonal deep well region for routing the body-bias voltage for MOSFETS in surface well regions is provided and described.
    Type: Application
    Filed: December 31, 2002
    Publication date: July 1, 2004
    Inventors: Mike Pelham, James B. Burr