Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation. Embodiments of VRS interfaces include a clearing signal generator configured to generate a clearing signal corresponding with the timing of a noise event. The clearing signal may be configured to clear a post-processing circuit.

Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation. Embodiments of VRS interfaces include a clearing signal generator configured to generate a clearing signal corresponding with the timing of a noise event. The clearing signal may be configured to clear a post-processing circuit.

Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation. Embodiments of VRS interfaces include a clearing signal generator configured to generate a clearing signal corresponding with the timing of a noise event. The clearing signal may be configured to clear a post-processing circuit.

Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. In one embodiment the VRS interface uses a comparator with hysteresis to generate a trailing edge signal. In another embodiment the VRS interface uses bias voltages to reduce the probability of erroneous transitions in a trailing edge signal. In either case the VRS interface can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.

Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: The embodiments described herein can provide a variable reluctance sensor (VRS) interface that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. To facilitate this, the VRS interface includes a pre-processing circuit configured to modify a VRS signal to prevent the modified VRS signal from dropping below a threshold value and generating erroneous transitions in the detect signal pulse between leading and lagging edges of a tooth. In one embodiment the pre-processing circuit comprises a peak and hold circuit. In another embodiment the pre-processing circuit comprises a resistor-capacitor circuit. In either case the pre-processing circuit can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.

Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation. Embodiments of VRS interfaces include a clearing signal generator configured to generate a clearing signal corresponding with the timing of a noise event. The clearing signal may be configured to clear a post-processing circuit.

Abstract: The embodiments described herein can provide a variable reluctance sensor (VRS) interface that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. To facilitate this, the VRS interface includes a pre-processing circuit configured to modify a VRS signal to prevent the modified VRS signal from dropping below a threshold value and generating erroneous transitions in the detect signal pulse between leading and lagging edges of a tooth. In one embodiment the pre-processing circuit comprises a peak and hold circuit. In another embodiment the pre-processing circuit comprises a resistor-capacitor circuit. In either case the pre-processing circuit can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.

Abstract: The embodiments described herein include systems with a variable reluctance sensor (VRS) interface and methods of their operation that may reduce the probability of erroneous transitions in a resulting generated detect signal. As such, the VRS interface can improve the accuracy of position and/or motion determinations, and thus can improve the performance of a wide variety of devices that use variable reluctance sensors. In one embodiment the VRS interface uses a comparator with hysteresis to generate a trailing edge signal. In another embodiment the VRS interface uses bias voltages to reduce the probability of erroneous transitions in a trailing edge signal. In either case the VRS interface can prevent erroneous transitions in the detect signal and thus may improve the performance and accuracy of the system.

Abstract: A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal.

Abstract: An interface for processing a variable reluctance sensor signal provided by a variable reluctance sensor including an integrator, an arming comparator and a detect circuit. The integrator includes an input for receiving the variable reluctance sensor signal and an output providing an integrated signal indicative of total flux change of the variable reluctance sensor. The arming comparator compares the integrated signal with a predetermined arming threshold and provides an armed signal indicative thereof. The detect circuit provides a reset signal after the armed signal is provided to reset the integrator. A corresponding method of processing the variable reluctance sensor signal is also described.

Abstract: A variable reluctance sensor system for processing a variable reluctance sensor signal including an arming comparator and an arming circuit. The arming comparator compares the variable reluctance sensor signal with an arming threshold which decreases proportional to 1/t from a predetermined maximum level and asserts an armed signal when the variable reluctance sensor signal reaches the arming threshold. The arming threshold may be decreased based on a scaling factor multiplied by 1/t to ensure detection of each pulse of the variable reluctance sensor signal. The arming threshold may decrease to a predetermined minimum level sufficiently low to intersect the variable reluctance sensor signal and sufficiently high relative to an expected noise level. The arming threshold is reset in response to a timing event, such as zero crossing of the variable reluctance sensor signal.

Abstract: A four stroke single cylinder combustion engine starting system with an electrical machine is operable as both a generator and a motor. The starting system has a single cylinder four stroke combustion engine. A piston of the engine is coupled to a shaft of the electrical machine. The starting system also has a motor driver having outputs coupled to the electrical machine. A controller is coupled to the driver and an ignition switch is coupled to the controller. In response to the controller receiving an ignition signal from the ignition switch, the driver controls the electrical machine to operate as a motor so that the electrical machine rotates in a reverse direction to move the piston in a reverse stroke cycle. After the piston reverses to a power stroke position of the reverse stroke cycle the driver controls electrical machine to rotate in a forward direction to move the piston in a forward stroke cycle to attempt to ignite the combustion engine.

Abstract: A four stroke single cylinder combustion engine starting system with an electrical machine is operable as both a generator and a motor. The starting system has a single cylinder four stroke combustion engine. A piston of the engine is coupled to a shaft of the electrical machine. The starting system also has a motor driver having outputs coupled to the electrical machine. A controller is coupled to the driver and an ignition switch is coupled to the controller. In response to the controller receiving an ignition signal from the ignition switch, the driver controls the electrical machine to operate as a motor so that the electrical machine rotates in a reverse direction to move the piston in a reverse stroke cycle. After the piston reverses to a power stroke position of the reverse stroke cycle the driver controls electrical machine to rotate in a forward direction to move the piston in a forward stroke cycle to attempt to ignite the combustion engine.

Abstract: An analog-to-digital converter (ADC) device includes an input terminal to receive an analog signal, an analog component, and control logic. The analog component includes an amplifier having an input and an output and a capacitor network coupled to the input and the output of the amplifier. The capacitor network comprises a plurality of capacitors. The control logic is configured to, in a first mode, configure the capacitor network and the amplifier in an amplification configuration to amplify the analog signal by a predetermined gain to generate an amplified analog signal. The control logic further is configured to, in a second mode, configure the capacitor network and the amplifier to generate a series of one or more residue voltages using the amplified analog signal.

Abstract: An analog-to-digital converter (ADC) device includes an input terminal to receive an analog signal, an analog component, and control logic. The analog component includes an amplifier having an input and an output and a capacitor network coupled to the input and the output of the amplifier. The capacitor network comprises a plurality of capacitors. The control logic is configured to, in a first mode, configure the capacitor network and the amplifier in an amplification configuration to amplify the analog signal by a predetermined gain to generate an amplified analog signal. The control logic further is configured to, in a second mode, configure the capacitor network and the amplifier to generate a series of one or more residue voltages using the amplified analog signal.