Patents by Inventor Mike Rolfe Ferrara

Mike Rolfe Ferrara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • System and method for controlling the impact of periodic jitter caused by non-ideal phase interpolators
    Patent number: 10313104
    Abstract: In some aspects, the disclosure is directed to methods and systems for controlling periodic jitter arising from a phase interpolator (PI). A receiver can receive incoming data. A fractional-N phase-locked loop (PLL) can receive a reference clock. Measurement circuitry can measure a parts per million (PPM) offset between the incoming data and the reference clock, of a PI. The fractional-N PLL can restrict jitter arising from the PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the fractional-N PLL to reduce the PPM offset of the PI.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: June 4, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Amiad Dvir, Mike Rolfe Ferrara, Vitaly Zborovski, Mario Caresosa, Ryan Hirth, Assaf Naor
  • SYSTEM AND METHOD FOR CONTROLLING THE IMPACT OF PERIODIC JITTER CAUSED BY NON-IDEAL PHASE INTERPOLATORS
    Publication number: 20190089520
    Abstract: In some aspects, the disclosure is directed to methods and systems for controlling periodic jitter arising from a phase interpolator (PI). A receiver can receive incoming data. A fractional-N phase-locked loop (PLL) can receive a reference clock. Measurement circuitry can measure a parts per million (PPM) offset between the incoming data and the reference clock, of a PI. The fractional-N PLL can restrict jitter arising from the PI, to frequencies within a predefined bandwidth, by tuning a center frequency of the fractional-N PLL to reduce the PPM offset of the PI.
    Type: Application
    Filed: September 18, 2017
    Publication date: March 21, 2019
    Applicant: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Amiad Dvir, Mike Rolfe Ferrara, Vitaly Zborovski, Mario Caresosa, Ryan Hirth, Assaf Naor