Abstract: Presented herein is a printed circuit board (PCB) assembly with an absorber having a perforated structure. The absorber is positioned between a trace of a PCB and a connector that couples the PCB to an enclosure. The absorber includes a perforated structure to maintain an integrity of a signal propagated along the trace, while improving electromagnetic interference and/or electromagnetic compatibility properties.

Abstract: In some embodiments, an apparatus, includes a pad of a printed circuit board (PCB) configured to couple to an electrical component separate from the PCB and a via formed through the pad. The via is offset from a center of the pad such that a distance between the via and a most adjacent trace electrically separate from the via is above a threshold distance.

Abstract: In some aspects, the techniques described herein relate to an apparatus including: a cable termination connection assembly, comprising: a base including a body defining a groove therein; a signal contact member that is engageable with the base, at least a portion of the signal contact member being insertable into the groove of the body of the base, the signal contact member including pins extending therefrom; and a cover that is engageable with the signal contact member, wherein the cover can be pressed by a user to cause the pins to extend through the base and engage a PCB.

Abstract: Provide for herein is an apparatus that includes multiple printed circuit board (PCB) layers and a via assembly. The via assembly includes a signal via extending through the multiple layers, and the signal via is configured to transmit a signal between the layers. The via assembly also includes a capacitive structure connected to the signal via to adjust an impedance of the via assembly along the via assembly. The capacitive structure is physically and electrically separate from other components of the PCB.

Abstract: In some embodiments, an integrated circuit (IC) includes multiple packages that are separate from one another. Each package includes a pad, and a core via is electrically coupled to the pads of the separate packages to electrically couple the packages to one another. At least one of the pads includes an oblong shape to match its impedance with the impedance of the core via.

Abstract: An apparatus includes a printed circuit board (PCB), and an integrated circuit (IC) package connected with the PCB. The IC package includes a package substrate, a die secured to the package substrate and including an integrated circuit, and a stiffener ring secured to the package substrate and surrounding so as to define a perimeter around the die. The stiffener ring increases a rigidity of the package substrate and delivers electrical power to the integrated circuit, where the stiffener ring includes a first conductive layer forming a power (PWR) plane for the integrated circuit, a second conductive layer forming a ground (GND) plane for the integrated circuit, and an insulating layer disposed between the first conductive layer and the second conductive layer.

Abstract: In some aspects, the techniques described herein relate to an apparatus for connecting cables to Input Output (IO) connector pins, including: a first Printed Circuit Board (PCB) configured to receive terminal ends of a plurality of cables, wherein the terminal ends of the plurality of cables are electrically isolated from one another in the first PCB; a second PCB configured to receive a plurality of IO connector pins, wherein the plurality of IO connector pins are electrically isolated from one another in the second PCB; and wherein the first PCB is configured to join to the second PCB to connect each of the terminal ends of the plurality of cables to corresponding pins of the plurality of IO connector pins.

Abstract: In some aspects, the techniques described herein relate to an apparatus including: a semiconductor device substrate material; a first signal conductor incorporated into the semiconductor device substrate material; a second signal conductor incorporated into the semiconductor device substrate material; and a ground conductor incorporated into the semiconductor device substrate material between the first signal conductor and the second signal conductor, wherein the ground conductor includes a first elongated portion and a second elongated portion arranged at an angle relative to the first elongated portion.

Abstract: Presented herein is a method comprising: determining skew values of cables, each skew value indicating a time of signal propagation along a respective cable at a respective signal frequency value, and the skew values being frequency dependent and varying at signal frequency values; determining skew behavior property values for each cable based on the skew values; determining a performance metric value for each skew behavior property value; determining a relationship between the skew values and the signal frequency values at each performance metric value based on the performance metric value for each skew behavior property value; and coupling a first electronic component and a second electronic component to one another using a new cable based on the relationship between the skew values and the signal frequency values at each performance metric value.

Abstract: A printed circuit board includes a grid of pads and tracks. The grid of pads includes a first pair of adjacent signal pads arranged in a first column and a second pair of adjacent signal pads arranged in a first row. A first signal pad of the second pair is arranged in the first column. The grid of pads also includes a third pair of adjacent signal pads arranged in a second row. A second signal pad of the first pair is arranged in the second row. The grid of pads further includes a fourth pair of adjacent signal pads arranged in a second column. A third signal pad of the third pair is arranged in the second column. A fourth signal pad of the fourth pair is arranged in the first row. The tracks are electrically coupled to the first, second, third, and fourth pairs.

Abstract: Channel predictive behavior and fault analysis may be provided. A forward time value may be determined comprising a time a forward signal takes to travel from a transmitter over a channel to the receiver. Next, a reflected time value may be determined comprising a time a reflected signal takes to travel to the receiver. The reflected signal may be associated with the forward signal. A discontinuity may then be determined to exist on the channel based on the forward time value and the reflected time value. The reflected signal may be caused by the discontinuity and a high impedance or low impedance at the transmitter present after the forward signal is sent.

Abstract: An apparatus includes an integrated circuit package and a heatsink. The integrated circuit package includes a substrate, an integrated circuit, a first plurality of signal conductors, and a second plurality of signal conductors. The substrate includes a first surface and a second surface opposite the first surface. The integrated circuit is coupled to the first surface of the substrate. The first plurality of signal conductors are arranged along a periphery of the first surface of the substrate. The second plurality of signal conductors are arranged along a periphery of the second surface of the substrate. The heatsink includes a first portion positioned along the first surface of the substrate and a second portion positioned along the second surface of the substrate.

Abstract: The techniques described herein relate to an apparatus including: a support structure of an integrated circuit device; and an elongated cavity formed in the support structure of the integrated circuit device, wherein an interior of the elongated cavity is plated with a conductive material separated into a first power connection portion and a first ground connection portion.

Abstract: A communication interconnect system is described. The system may include a co-packaged cables (CPC) tile with a slot formed from a first surface to slot surface at a first depth in the CPC tile and a plurality of channels formed between the slot surface and a second surface opposite the first surface. The system may also include a twinaxial cable with a pair of conductors positioned in the slot such that the pair of conductors are inserted in a pair of channels of the plurality of channels to establish an electrical connection between the twinaxial cable and the pair of channels. The system also includes a plurality of elastomer pins positioned in the plurality of channels adjacent to the second surface.

Abstract: A method is provided that includes inspecting a layer of a printed circuit board through an inspection window comprising an opening formed in one or more other layers of the printed circuit board and identifying a location of a trace aligned with the inspection window, relative to a marker in a fiber bundle of a fiber weave to assess fiber weave skew.

Abstract: Certain aspects of the present disclosure provide techniques for pinless interconnect for twinaxial cables to an IC. This includes a socket coupled to an integrated circuit (IC), a port structure coupled to the socket, and a ground connector inserted into the port structure. It further includes a twinaxial cable including a pair of conductors inserted through the ground connector to establish an electrical connection between the twinaxial cable and the IC.

Abstract: In one embodiment, a method includes inspecting a fiber weave for use in a printed circuit board with an automated optical inspection tool and identifying a distance between fiber bundles in the fiber weave. The fiber weave comprises a plurality of the fiber bundles woven to form the fiber weave and a portion of the fiber bundles comprise markers and identifying a distance between the fiber bundles in the fiber weave comprises measuring a distance between the markers.

Abstract: Channel predictive behavior and fault analysis may be provided. A forward time value may be determined comprising a time a forward signal takes to travel from a transmitter over a channel to the receiver. Next, a reflected time value may be determined comprising a time a reflected signal takes to travel to the receiver. The reflected signal may be associated with the forward signal. A discontinuity may then be determined to exist on the channel based on the forward time value and the reflected time value. The reflected signal may be caused by the discontinuity and a high impedance or low impedance at the transmitter present after the forward signal is sent.

Abstract: An apparatus includes a printed circuit board (PCB), and an integrated circuit (IC) package connected with the PCB. The IC package includes a package substrate, a die secured to the package substrate and including an integrated circuit, and a stiffener ring secured to the package substrate and surrounding so as to define a perimeter around the die. The stiffener ring increases a rigidity of the package substrate and delivers electrical power to the integrated circuit, where the stiffener ring includes a first conductive layer forming a power (PWR) plane for the integrated circuit, a second conductive layer forming a ground (GND) plane for the integrated circuit, and an insulating layer disposed between the first conductive layer and the second conductive layer.

Abstract: Channel predictive behavior and fault analysis may be provided. A forward time value may be determined comprising a time a forward signal takes to travel from a transmitter over a channel to the receiver. Next, a reflected time value may be determined comprising a time a reflected signal takes to travel to the receiver. The reflected signal may be associated with the forward signal. A discontinuity may then be determined to exist on the channel based on the forward time value and the reflected time value. The reflected signal may be caused by the discontinuity and a high impedance or low impedance at the transmitter present after the forward signal is sent.