Patents by Inventor Mike Splithof

Mike Splithof has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9998079
    Abstract: A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: June 12, 2018
    Assignee: NXP B.V.
    Inventor: Mike Splithof
  • Publication number: 20170310290
    Abstract: A chopper amplifier and method of operation are described. The chopper amplifier comprises a first chopper arranged to modulate an input signal using a first chopper signal having a chopper frequency. An amplification stage has an input arranged to receive the chopped signal and an output, and supplies an amplified signal at the output. An output chopper is arranged to integrate the amplified signal using a second chopper signal having the chopper frequency to generate an amplified output signal. The amplification stage is further configured to filter the chopped signal to attenuate signal components having frequencies lower than the chopper frequency.
    Type: Application
    Filed: April 12, 2017
    Publication date: October 26, 2017
    Inventor: Mike Splithof
  • Patent number: 7948320
    Abstract: The present invention relates to a synchronization circuit for an integrated amplifier provided with a bandwidth control in accordance to a bandwidth control signal, wherein said synchronization circuit comprises a control terminal for a control signal and rank selector means connected to an internal control signal and being configured to emboss said internal control signal to said control terminal, if said internal control signal has a higher rank in accordance to a predetermined ranking criteria in comparison to said control signal. Further, the present invention relates to a respective synchronization method for continuously communicating and synchronizing of a common control signal for multiple circuits. One preferred application of the invention is in temperature protection by a synchronized bandwidth control for multiple class-AB amplifiers by means of only one additional terminal pin per amplifier.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: May 24, 2011
    Assignee: NXP B.V.
    Inventors: Mike Splithof, Paul Bruin
  • Publication number: 20100039176
    Abstract: The present invention relates to a synchronization circuit for an integrated amplifier provided with a bandwidth control in accordance to a bandwidth control signal, wherein said synchronization circuit comprises a control terminal for a control signal and rank selector means connected to an internal control signal and being configured to emboss said internal control signal to said control terminal, if said internal control signal has a higher rank in accordance to a predetermined ranking criteria in comparison to said control signal. Further, the present invention relates to a respective synchronization method for continuously communicating and synchronizing of a common control signal for multiple circuits. One preferred application of the invention is in temperature protection by a synchronized bandwidth control for multiple class-AB amplifiers by means of only one additional terminal pin per amplifier.
    Type: Application
    Filed: January 17, 2006
    Publication date: February 18, 2010
    Inventors: Mike Splithof, Paul Bruin
  • Publication number: 20050001686
    Abstract: A driver circuit of an image display apparatus comprises driver circuit with a class A/B push-pull stage (T3, T5). The driver circuit contains an n-type pull transistor (T3), an n-type control transistor (T2) with a main current channel terminal coupled to a control electrode of the pull transistor (T2) and a voltage source (V) applying a predetermined voltage over a series connection of the control electrode-main current channel terminals of the control transistor (T2) and the pull transistor (T3). The current from the control transistor (T2) flows to a p-type push transistor (T5) via a current mirror (T4, T5). An input transistor (T1) draws all of the current from the control transistor (T2) via a node (142) between the control transistor (T2) and the pull transistor (T3) to control the ratio between the currents through these transistors (T2, T3).
    Type: Application
    Filed: October 24, 2002
    Publication date: January 6, 2005
    Inventor: Mike Splithof