Patents by Inventor Mike Teh-An Liang

Mike Teh-An Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Six-to-one signal/power ratio bump and trace pattern for flip chip design
    Patent number: 6591410
    Abstract: A method for making a bump and trace layout for an integrated circuit die includes the step of replicating a routing tile having a first column of I/O pads and a second column of I/O pads wherein the first column is offset from the second column so that the I/O pads of the first column are interleaved between the I/O pads of the second column.
    Type: Grant
    Filed: December 28, 2000
    Date of Patent: July 8, 2003
    Assignee: LSI Logic Corporation
    Inventors: Anwar Ali, Mike Teh-An Liang, Bing Yi
  • Flip chip trace library generator
    Patent number: 6526540
    Abstract: A method of generating a trace library includes the steps of receiving as inputs a plurality of technology dependent parameters and a trace template and generating a trace layout from the inputs.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: February 25, 2003
    Assignee: LSI Logic Corporation
    Inventors: Eric Fong, Thinh Tran, Mike Teh-An Liang