Patents by Inventor Mike Wiznerowicz

Mike Wiznerowicz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • High performance serial bus testing methodology
    Patent number: 7464307
    Abstract: According to one embodiment, a built-in self test (IBIST) architecture/methodology is disclosed. The IBIST provides for testing the functionality of an interconnect (such as a bus) between a transmitter and a receiver component. The IBIST architecture includes a pattern generator and a pattern checker. The pattern checker operates to compare a received plurality of bits (for the pattern generator) with a previously stored plurality of bits.
    Type: Grant
    Filed: March 25, 2003
    Date of Patent: December 9, 2008
    Assignee: Intel Corporation
    Inventors: Jay J. Nejedlo, Mike Wiznerowicz, David G. Ellis, Richard J. Glass, Andrew W. Martwick, Theodore Z. Schoenborn
  • High performance serial bus testing methodology
    Publication number: 20040204912
    Abstract: According to one embodiment, a built-in self test (IBIST) architecture/methodology is disclosed. The IBIST provides for testing the functionality of an interconnect (such as a bus) between a transmitter and a receiver component. The IBIST architecture includes a pattern generator and a pattern checker. The pattern checker operates to compare a received plurality of bits (for the pattern generator) with a previously stored plurality of bits.
    Type: Application
    Filed: March 25, 2003
    Publication date: October 14, 2004
    Inventors: Jay J. Nejedlo, Mike Wiznerowicz, David G. Ellis, Richard J. Glass, Andrew W. Martwick, Theodore Z. Schoenborn