Abstract: A SAR ADC may include a plurality of capacitor networks, wherein each capacitor network of a plurality of capacitor networks has a plurality of sampling capacitors for sampling over a plurality of sampling sub-phases an analog input signal to the SAR ADC and at least one non-sampling capacitor. The SAR ADC may also include a DAC comprising a plurality of sub-DACs including at least a first sub-DAC representing most significant bits of an output of the SAR ADC, wherein the output of the first sub-DAC is coupled to the sampling capacitors of the plurality of capacitor networks and a second sub-DAC representing bits of the output of the SAR ADC lesser in magnitude significance than those of the first sub-DAC, wherein the output of the second sub-DAC is coupled to a respective one of at least one non-sampling capacitor of each of the plurality of capacitor networks.

Abstract: A SAR ADC may include a plurality of capacitor networks, wherein each capacitor network of the a plurality of capacitor networks has a plurality of sampling capacitors for sampling over a plurality of sampling sub-phases an analog input signal to the SAR ADC and at least one non-sampling capacitor. The SAR ADC may also include a DAC comprising a plurality of sub-DACs including at least a first sub-DAC representing most significant bits of an output of the SAR ADC, wherein the output of the first sub-DAC is coupled to the sampling capacitors of the plurality of capacitor networks and a second sub-DAC representing bits of the output of the SAR ADC lesser in magnitude significance than those of the first sub-DAC, wherein the output of the second sub-DAC is coupled to a respective one of at least one non-sampling capacitor of each of the plurality of capacitor networks.

Abstract: A method may include controlling switching behavior of switches of a switch-mode power supply based on a desired physical quantity associated with the switch-mode power supply, wherein the desired physical quantity is based at least in part on a slope compensation signal and generating the slope compensation signal to have a compensation value of approximately zero at an end of a duty cycle of operation of the switch-mode power supply.

Abstract: An integrated circuit may have two signal paths: an open-loop modulator (which may comprise a digital-input Class-D amplifier) and a closed-loop modulator (which may comprise an analog-input Class-D amplifier). A control subsystem may be capable of selecting either of the open-loop modulator or the closed-loop modulator as a selected path based on one or more characteristics (e.g., signal magnitude) of an input audio signal. For example, for higher-magnitude signals, the closed-loop modulator may be selected while the open-loop modulator may be selected for lower-magnitude signals. In some instances, when the open-loop modulator is selected as the selected path, the closed-loop modulator may power off, which may reduce power consumption. In addition, one or more techniques may be applied to reduce or eliminate user-perceptible audio artifacts caused by switching between the open-loop modulator and the closed-loop modulator, and vice versa.

Abstract: A method for controlling a current mode switch mode power supply may include detecting a peak inductor current of a power inductor of the current mode switch mode power supply, estimating a load current based on a variable of a main control loop of the current mode switch mode power supply, detecting, within a main control loop of the current mode switch mode power supply, whether the load current is lower in magnitude than an estimated boundary condition current threshold, the estimated boundary condition current threshold defining a crossover threshold between operation of the current mode switch mode power supply in a continuous conduction mode and operation of the current mode switch mode power supply in a discontinuous conduction mode, and responsive to the load current being lower in magnitude than the estimated boundary condition current, causing pulse skipping of an output signal of the current mode switch mode power supply on an immediately subsequent switching cycle of the current mode switch mode p

Abstract: A method may include controlling switching behavior of switches of a switch-mode power supply based on a desired physical quantity associated with the switch-mode power supply, wherein the desired physical quantity is based at least in part on a slope compensation signal and generating the slope compensation signal to have a compensation value of approximately zero at an end of a duty cycle of operation of the switch-mode power supply.

Abstract: An enhanced resolution successive-approximation register (SAR) analog-to-digital converter (ADC) is provided that includes a digital-to-analog converter (DAC), a comparator and enhanced resolution SAR control logic. The DAC includes analog circuitry that is configured to convert an M-bit digital input to an analog output. The comparator includes a plurality of coupling capacitors. The enhanced resolution SAR control logic is configured to generate an M-bit approximation of an input voltage and to store a residue voltage in at least one of the coupling capacitors. The residue voltage represents a difference between the input voltage and the M-bit approximation of the input voltage. The enhanced resolution SAR control logic is further configured to generate an N-bit approximation of the input voltage based on the stored residue voltage, where N>M.

Abstract: An enhanced resolution successive-approximation register (SAR) analog-to-digital converter (ADC) is provided that includes a digital-to-analog converter (DAC), a comparator and enhanced resolution SAR control logic. The DAC includes analog circuitry that is configured to convert an M-bit digital input to an analog output. The comparator includes a plurality of coupling capacitors. The enhanced resolution SAR control logic is configured to generate an M-bit approximation of an input voltage and to store a residue voltage in at least one of the coupling capacitors. The residue voltage represents a difference between the input voltage and the M-bit approximation of the input voltage. The enhanced resolution SAR control logic is further configured to generate an N-bit approximation of the input voltage based on the stored residue voltage, where N>M.