Patents by Inventor Mikhail Charny
Mikhail Charny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260244163Abstract: A test device determines a Global Navigation Satellite System (GNSS) signal propagation delay in a GNSS signal distribution system (GSDS) for a radio access network, and can further perform long-term tests on a GSDS without having access to a GNSS satellite. The test device includes a GNSS receiver and a clock that can be re-tuned to accommodate performing tests on the GSDS.Type: ApplicationFiled: November 20, 2025Publication date: August 20, 2026Applicant: VIAVI SOLUTION INC.Inventors: David ROYLE, Mikhail CHARNY, Joseph Gomez, Roland Stooss
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Patent number: 12498676Abstract: A test device determines a Global Navigation Satellite System (GNSS) signal propagation delay in a GNSS signal distribution system (GSDS) for a radio access network, and can further perform long-term tests on a GSDS without having access to a GNSS satellite. The test device includes a GNSS receiver and a clock that can be re-tuned to accommodate performing tests on the GSDS.Type: GrantFiled: October 24, 2022Date of Patent: December 16, 2025Assignee: VIAVI SOLUTIONS INC.Inventors: David Royle, Mikhail Charny, Joseph Gomez, Roland Stooss
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Patent number: 12235328Abstract: A modular network test device can test optical fiber networks or other types of networks. The test device includes a base module to perform network tests and interfaces to connect to removably connectable modules that can perform other network tests and supply additional battery power to the test device. The base module can control charging and discharging of a base module battery and an external battery of a removably connectable module connected to the base module. The base module can determine power requirements of the base module and a removably connectable module to perform network tests, and control power supplied by the base module battery and the external battery to the test device based on the power requirements.Type: GrantFiled: April 18, 2023Date of Patent: February 25, 2025Assignee: VIAVI SOLUTIONS INC.Inventors: Craig Boledovic, Andrew Rayno, Mikhail Charny
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Publication number: 20230130665Abstract: A test device determines a Global Navigation Satellite System (GNSS) signal propagation delay in a GNSS signal distribution system (GSDS) for a radio access network, and can further perform long-term tests on a GSDS without having access to a GNSS satellite. The test device includes a GNSS receiver and a clock that can be re-tuned to accommodate performing tests on the GSDS.Type: ApplicationFiled: October 24, 2022Publication date: April 27, 2023Applicant: VIAVI SOLUTIONS INC.Inventors: David Royle, Mikhail Charny, Joseph Gomez, Roland Stooss
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Patent number: 8310383Abstract: A serializer device is used for generation, from a parallel digital signal, of a clock signal or a serial binary data signal having a pre-determined amount of jitter. A binary number having consecutive groups of ones and zeroes, when serialized by the serializer device, produces a clock signal. By varying the number of ones and zeroes on the binary number, a pre-determined amount of jitter can be generated. Use of sigma-delta modulation in combination with a phase-locked loop circuitry allows one to obtain a smoothly varying jitter of the output signal.Type: GrantFiled: December 23, 2010Date of Patent: November 13, 2012Assignee: JDS Uniphase CorporationInventors: David J. Royle, Mikhail Charny
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Publication number: 20110156933Abstract: A serializer device is used for generation, from a parallel digital signal, of a clock signal or a serial binary data signal having a pre-determined amount of jitter. A binary number having consecutive groups of ones and zeroes, when serialized by the serializer device, produces a clock signal. By varying the number of ones and zeroes on the binary number, a pre-determined amount of jitter can be generated. Use of sigma-delta modulation in combination with a phase-locked loop circuitry allows one to obtain a smoothly varying jitter of the output signal.Type: ApplicationFiled: December 23, 2010Publication date: June 30, 2011Applicant: JDS Uniphase CorporationInventors: David J. Royle, Mikhail Charny
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Patent number: 7769297Abstract: The invention relates to a transceiver optical system in which a single serializer/deserializer (SERDES) chip is used to drive a plurality of transceiver modules.Type: GrantFiled: August 29, 2007Date of Patent: August 3, 2010Assignee: Acterna LLCInventors: David J. Royle, Walter Hargis, Mikhail Charny
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Patent number: 7477521Abstract: Printed circuit boards (PCB's) with edge connectors undergo bending stresses whenever the edge connectors are plugged into mating connectors. The bending stresses causes deformation of the printed circuit board, which can have deleterious effects on electrical components thereon. Slots are provided on the PCB to enable the portion of the PCB surrounding the edge connector to bend relative to the remainder of the PCB, thereby confine the bending to a localized area between the ends of the slots, and isolate the electrical components from any stresses caused thereby.Type: GrantFiled: April 16, 2008Date of Patent: January 13, 2009Assignee: Acterna LLCInventors: Mikhail Charny, David J. Royle
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Publication number: 20080285242Abstract: Printed circuit boards (PCB's) with edge connectors undergo bending stresses whenever the edge connectors are plugged into mating connectors. The bending stresses causes deformation of the printed circuit board, which can have deleterious effects on electrical components thereon. Slots are provided on the PCB to enable the portion of the PCB surrounding the edge connector to bend relative to the remainder of the PCB, thereby confine the bending to a localized area between the ends of the slots, and isolate the electrical components from any stresses caused thereby.Type: ApplicationFiled: April 16, 2008Publication date: November 20, 2008Applicant: ACTERNA LLCInventors: Mikhail Charny, David J. Royle
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Publication number: 20080063395Abstract: The invention relates to a transceiver optical system in which a single serializer/deserializer (SERDES) chip is used to drive a plurality of transceiver modules.Type: ApplicationFiled: August 29, 2007Publication date: March 13, 2008Applicant: ACTERNA LLCInventors: David J. Royle, Walter Hargis, Mikhail Charny
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Publication number: 20070160331Abstract: A pluggable electro-optical module is mounted completely within the housing of a host device, e.g. testing equipment, to protect the module from external forces, such as ESD, dust and impacts. Furthermore, an equipment manufacturer can use any form of electro-optical module with any type of optical connector receptor, and adapt the electro-optic module into their optical equipment by using an adaptor cable and an optical connector adaptor, which optically couples the module to their end customer's network regardless of the optical connector on the module or the network cable.Type: ApplicationFiled: September 27, 2006Publication date: July 12, 2007Applicant: ACTERNA LLCInventors: Mikhail CHARNY, Andrew Mark Saunders
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Patent number: 7234880Abstract: A pluggable electro-optical module is mounted completely within the housing of a host device, e.g. testing equipment, to protect the module from external forces, such as ESD, dust and impacts. Furthermore, an equipment manufacturer can use any form of electro-optical module with any type of optical connector receptor, and adapt the electro-optic module into their optical equipment by using an adaptor cable and an optical connector adaptor, which optically couples the module to their end customer's network regardless of the optical connector on the module or the network cable.Type: GrantFiled: September 27, 2006Date of Patent: June 26, 2007Assignee: Acterna L.L.C.Inventors: Mikhail Charny, Andrew Mark Saunders