Patents by Inventor Mikhail Charny

Mikhail Charny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230130665
    Abstract: A test device determines a Global Navigation Satellite System (GNSS) signal propagation delay in a GNSS signal distribution system (GSDS) for a radio access network, and can further perform long-term tests on a GSDS without having access to a GNSS satellite. The test device includes a GNSS receiver and a clock that can be re-tuned to accommodate performing tests on the GSDS.
    Type: Application
    Filed: October 24, 2022
    Publication date: April 27, 2023
    Applicant: VIAVI SOLUTIONS INC.
    Inventors: David Royle, Mikhail Charny, Joseph Gomez, Roland Stooss
  • Patent number: 8310383
    Abstract: A serializer device is used for generation, from a parallel digital signal, of a clock signal or a serial binary data signal having a pre-determined amount of jitter. A binary number having consecutive groups of ones and zeroes, when serialized by the serializer device, produces a clock signal. By varying the number of ones and zeroes on the binary number, a pre-determined amount of jitter can be generated. Use of sigma-delta modulation in combination with a phase-locked loop circuitry allows one to obtain a smoothly varying jitter of the output signal.
    Type: Grant
    Filed: December 23, 2010
    Date of Patent: November 13, 2012
    Assignee: JDS Uniphase Corporation
    Inventors: David J. Royle, Mikhail Charny
  • Publication number: 20110156933
    Abstract: A serializer device is used for generation, from a parallel digital signal, of a clock signal or a serial binary data signal having a pre-determined amount of jitter. A binary number having consecutive groups of ones and zeroes, when serialized by the serializer device, produces a clock signal. By varying the number of ones and zeroes on the binary number, a pre-determined amount of jitter can be generated. Use of sigma-delta modulation in combination with a phase-locked loop circuitry allows one to obtain a smoothly varying jitter of the output signal.
    Type: Application
    Filed: December 23, 2010
    Publication date: June 30, 2011
    Applicant: JDS Uniphase Corporation
    Inventors: David J. Royle, Mikhail Charny
  • Patent number: 7769297
    Abstract: The invention relates to a transceiver optical system in which a single serializer/deserializer (SERDES) chip is used to drive a plurality of transceiver modules.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: August 3, 2010
    Assignee: Acterna LLC
    Inventors: David J. Royle, Walter Hargis, Mikhail Charny
  • Patent number: 7477521
    Abstract: Printed circuit boards (PCB's) with edge connectors undergo bending stresses whenever the edge connectors are plugged into mating connectors. The bending stresses causes deformation of the printed circuit board, which can have deleterious effects on electrical components thereon. Slots are provided on the PCB to enable the portion of the PCB surrounding the edge connector to bend relative to the remainder of the PCB, thereby confine the bending to a localized area between the ends of the slots, and isolate the electrical components from any stresses caused thereby.
    Type: Grant
    Filed: April 16, 2008
    Date of Patent: January 13, 2009
    Assignee: Acterna LLC
    Inventors: Mikhail Charny, David J. Royle
  • Publication number: 20080285242
    Abstract: Printed circuit boards (PCB's) with edge connectors undergo bending stresses whenever the edge connectors are plugged into mating connectors. The bending stresses causes deformation of the printed circuit board, which can have deleterious effects on electrical components thereon. Slots are provided on the PCB to enable the portion of the PCB surrounding the edge connector to bend relative to the remainder of the PCB, thereby confine the bending to a localized area between the ends of the slots, and isolate the electrical components from any stresses caused thereby.
    Type: Application
    Filed: April 16, 2008
    Publication date: November 20, 2008
    Applicant: ACTERNA LLC
    Inventors: Mikhail Charny, David J. Royle
  • Publication number: 20080063395
    Abstract: The invention relates to a transceiver optical system in which a single serializer/deserializer (SERDES) chip is used to drive a plurality of transceiver modules.
    Type: Application
    Filed: August 29, 2007
    Publication date: March 13, 2008
    Applicant: ACTERNA LLC
    Inventors: David J. Royle, Walter Hargis, Mikhail Charny
  • Publication number: 20070160331
    Abstract: A pluggable electro-optical module is mounted completely within the housing of a host device, e.g. testing equipment, to protect the module from external forces, such as ESD, dust and impacts. Furthermore, an equipment manufacturer can use any form of electro-optical module with any type of optical connector receptor, and adapt the electro-optic module into their optical equipment by using an adaptor cable and an optical connector adaptor, which optically couples the module to their end customer's network regardless of the optical connector on the module or the network cable.
    Type: Application
    Filed: September 27, 2006
    Publication date: July 12, 2007
    Applicant: ACTERNA LLC
    Inventors: Mikhail CHARNY, Andrew Mark Saunders
  • Patent number: 7234880
    Abstract: A pluggable electro-optical module is mounted completely within the housing of a host device, e.g. testing equipment, to protect the module from external forces, such as ESD, dust and impacts. Furthermore, an equipment manufacturer can use any form of electro-optical module with any type of optical connector receptor, and adapt the electro-optic module into their optical equipment by using an adaptor cable and an optical connector adaptor, which optically couples the module to their end customer's network regardless of the optical connector on the module or the network cable.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: June 26, 2007
    Assignee: Acterna L.L.C.
    Inventors: Mikhail Charny, Andrew Mark Saunders