Abstract: A manufacturing method for an optical connector includes inserting and fixing a multi-core fiber into a ferrule, wherein at least one of a plurality of cores of the multi-core fiber is a spiral core, inserting the ferrule into a housing and aligning the cores with the housing around a central axis of the multi-core fiber, and obliquely polishing the ferrule until a width of an end surface of the ferrule perpendicular to a direction of the central axis reaches a predefined width.

Abstract: An object of the present invention is to appropriately limit an amplitude of an IQ baseband signal having different average powers for respective frequency bands B1 and B2, without degrading an SNR. The present invention relates to a signal processing circuit 9 for reducing a PAPR of a modulated wave signal to be inputted to a power amplification circuit 5. The signal processing circuit 9 includes a power calculation section 13 that calculates an instantaneous power P of an IQ baseband signal of the modulated wave signal, and a signal processing section 17 that limits an amplitude of the IQ baseband signal by performing a clipping process or the like, by using cancellation signals Ic and Qc capable of canceling the IQ baseband signal in accordance with average powers of the respective frequency bands B1 and B2, such that an upper limit of an instantaneous power P becomes equivalent to a predetermined threshold Pth.

Abstract: A peak power suppressing circuit can suppress a peak power of an IQ (In-phase and Quadrature-phase) baseband signal more assuredly. In particular, the peak power suppressing circuit performs a clipping process on an IQ baseband signal. The suppressing circuit includes a power calculation section that calculates an instantaneous power P of an IQ baseband signal, a pulse retention section that retains a cancellation pulse S that has a frequency component in a frequency band B of the IQ baseband signal and a frequency component outside the frequency band, and a clipping processing section that subtracts, from an IQ baseband signal whose instantaneous power P that has been calculated is greater than a predetermined threshold Pth, cancellation signals Ic and Qc obtained by multiplying increments ?I and ?Q of the IQ baseband signal from the threshold Pth by the cancellation pulse S.

Abstract: Disclosed is a distortion compensation circuit that efficiently compensates for distortion. A distortion compensation circuit (20) comprises a sampling memory unit (21), which accumulates an input signal and an output signal from an amplifier (4), a model estimation unit (22), which reads the input and output signals that are accumulated upon the sampling memory unit (21), estimates a model that represents an input/output characteristic of the amplifier (4), and outputs a coefficient that denotes the model thus estimated, and a distortion compensation unit (23), which compensates for a distortion of the amplifier (4), based on the coefficient.

Abstract: An object of the present invention is to appropriately limit an amplitude of an IQ baseband signal having different average powers for respective frequency bands B1 and B2, without degrading an SNR. The present invention relates to a signal processing circuit 9 for reducing a PAPR of a modulated wave signal to be inputted to a power amplification circuit 5. The signal processing circuit 9 includes a power calculation section 13 that calculates an instantaneous power P of an IQ baseband signal of the modulated wave signal, and a signal processing section 17 that limits an amplitude of the IQ baseband signal by performing a clipping process or the like, by using cancellation signals Ic and Qc capable of canceling the IQ baseband signal in accordance with average powers of the respective frequency bands B1 and B2, such that an upper limit of an instantaneous power P becomes equivalent to a predetermined threshold Pth.

Abstract: An object of the present invention is to provide a peak power suppressing circuit 9 that can suppress a peak power of an IQ baseband signal more assuredly. The present invention relates to the peak power suppressing circuit 9 that performs a clipping process on an IQ baseband signal. The suppressing circuit 9 includes a power calculation section 13 that calculates an instantaneous power P of an IQ baseband signal, a pulse retention section 22 that retains a cancellation pulse S that has a frequency component in a frequency band B of the IQ baseband signal and a frequency component outside the frequency band, and a clipping processing section 17 that subtracts, from an IQ baseband signal whose instantaneous power P that has been calculated is greater than a predetermined threshold Pth, cancellation signals Ic and Qc obtained by multiplying increments ?I and ?Q of the IQ baseband signal from the threshold Pth by the cancellation pulse S.

Abstract: Disclosed is a distortion compensation circuit that efficiently compensates for distortion. A distortion compensation circuit (20) comprises a sampling memory unit (21), which accumulates an input signal and an output signal from an amplifier (4), a model estimation unit (22), which reads the input and output signals that are accumulated upon the sampling memory unit (21), estimates a model that represents an input/output characteristic of the amplifier (4), and outputs a coefficient that denotes the model thus estimated, and a distortion compensation unit (23), which compensates for a distortion of the amplifier (4), based on the coefficient.