Patents by Inventor Mikhail Korolik

Mikhail Korolik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240258116
    Abstract: Exemplary semiconductor processing methods may include flowing an etchant precursor into a processing region of a semiconductor processing chamber. A substrate may be housed within the processing region. The substrate may define an exposed region of a titanium-containing material. The methods may include contacting the substrate with the etchant precursor. The methods may include removing at least a portion of the titanium-containing material.
    Type: Application
    Filed: January 26, 2023
    Publication date: August 1, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Baiwei Wang, Wanxing Xu, Lisa J. Enman, Aaron Dangerfield, Rohan Puligoru Reddy, Xiaolin C. Chen, Mikhail Korolik, Bhaskar Jyoti Bhuyan, Zhenjiang Cui, Anchuan Wang
  • Publication number: 20240120210
    Abstract: Exemplary methods of etching a silicon-containing material may include flowing a first fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. The methods may include flowing a sulfur-containing precursor into the remote plasma region of the semiconductor processing chamber. The methods may include forming a plasma within the remote plasma region to generate plasma effluents of the first fluorine-containing precursor and the sulfur-containing precursor. The methods may include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include isotropically etching the layers of silicon nitride while substantially maintaining the silicon oxide.
    Type: Application
    Filed: October 11, 2022
    Publication date: April 11, 2024
    Applicant: Applied Materials, Inc.
    Inventors: Mikhail Korolik, Paul E. Gee, Wei Ying Doreen Yong, Tuck Foong Koh, John Sudijono, Philip A. Kraus, Thai Cheng Chua
  • Publication number: 20220293430
    Abstract: Exemplary methods of etching a silicon-containing material may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. The methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region. The substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include isotropically etching the layers of silicon nitride while substantially maintaining the silicon oxide.
    Type: Application
    Filed: February 1, 2022
    Publication date: September 15, 2022
    Applicants: Applied Materials, Inc., National University of Singapore
    Inventors: Mikhail Korolik, Paul E. Gee, Bhaskar Jyoti Bhuyan, John Sudijono, Wei Ying Doreen Yong, Kah Wee Ang, Samarth Jain
  • Publication number: 20210111033
    Abstract: Exemplary methods of etching a silicon-containing material may include flowing a fluorine-containing precursor into a remote plasma region of a semiconductor processing chamber. The fluorine-containing precursor may be characterized by a molecular formula of XFy, and y may be greater than or equal to 5. The methods may include forming a plasma within the remote plasma region to generate plasma effluents of the fluorine-containing precursor. The methods may include flowing the plasma effluents into a processing region of the semiconductor processing chamber. A substrate may be positioned within the processing region, and the substrate may include a trench formed through stacked layers including alternating layers of silicon nitride and silicon oxide. The methods may include laterally etching the layers of silicon nitride.
    Type: Application
    Filed: October 10, 2019
    Publication date: April 15, 2021
    Applicants: Applied Materials, Inc., National University of Singapore
    Inventors: Mikhail Korolik, Paul E. Gee, Bhaskar Jyoti Bhuyan, John Sudijono, Doreen Wei Ying Yong, Kah Wee Ang, Debanjan Jana, Niharendu Mahapatra
  • Patent number: 10593553
    Abstract: Exemplary methods for etching a germanium-containing material may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a semiconductor processing chamber. The methods may include flowing effluents of the fluorine-containing precursor through apertures defined in a chamber component. The apertures may be coated with a catalytic material. The methods may include reducing a concentration of fluorine radicals in the plasma effluents with the catalytic material. The methods may also include delivering the plasma effluents to a processing region of the semiconductor processing chamber. A substrate having an exposed region of a germanium-containing material may be housed within the processing region. The methods may further include etching the germanium-containing material.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: March 17, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Mikhail Korolik, Nitin Ingle, Dimitri Kioussis
  • Patent number: 10204796
    Abstract: The present disclosure provides methods for etching a silicon material in a device structure in semiconductor applications. In one example, a method for etching features in a silicon material includes performing a remote plasma process formed from an etching gas mixture including HF gas without nitrogen etchants to remove a silicon material disposed on a substrate.
    Type: Grant
    Filed: November 27, 2017
    Date of Patent: February 12, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Anchuan Wang, Zihui Li, Mikhail Korolik
  • Publication number: 20190043727
    Abstract: Exemplary methods for etching a germanium-containing material may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a semiconductor processing chamber. The methods may include flowing effluents of the fluorine-containing precursor through apertures defined in a chamber component. The apertures may be coated with a catalytic material. The methods may include reducing a concentration of fluorine radicals in the plasma effluents with the catalytic material. The methods may also include delivering the plasma effluents to a processing region of the semiconductor processing chamber. A substrate having an exposed region of a germanium-containing material may be housed within the processing region. The methods may further include etching the germanium-containing material.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 7, 2019
    Applicant: Applied Materials, Inc.
    Inventors: Mikhail Korolik, Nitin Ingle, Dimitri Kioussis
  • Patent number: 10177227
    Abstract: The present disclosure provides methods for forming horizontal gate-all-around (hGAA) structure devices. In one example, a method includes selectively and laterally etching a first group of sidewalls of a first layer in a multi-material layer, wherein the multi-material layer comprises repeating pairs of the first layer and a second layer, the first and the second layers having the first group and a second group of sidewalls respectively, the first group of sidewalls from the first layer exposed through openings defined in the multi-material layer and a group of inner spacers formed atop of the second group of sidewalls from the second layer, forming a recess from the first group of sidewalls of the first layer and defining a vertical wall inward from an outer vertical surface of the inner spacer formed atop of the second layers, and forming an epi-silicon layer from the recess of the first layer.
    Type: Grant
    Filed: August 28, 2017
    Date of Patent: January 8, 2019
    Assignee: Applied Materials, Inc.
    Inventors: Naomi Yoshida, Lin Dong, Shiyu Sun, Myungsun Kim, Nam Sung Kim, Dimitri Kioussis, Mikhail Korolik, Gaetano Santoro, Vanessa Pena
  • Publication number: 20180226278
    Abstract: Systems and methods of etching a semiconductor substrate may include flowing an oxygen-containing precursor into a substrate processing region of a semiconductor processing chamber. The substrate processing region may house the semiconductor substrate, and the semiconductor substrate may include an exposed metal-containing material. The methods may include flowing a nitrogen-containing precursor into the substrate processing region. The methods may further include removing an amount of the metal-containing material.
    Type: Application
    Filed: February 6, 2017
    Publication date: August 9, 2018
    Applicant: Applied Materials, Inc.
    Inventors: Ranga Rao Arnepalli, Prerna Sonthalia Goradia, Robert Jan Visser, Nitin Ingle, Mikhail Korolik, Jayeeta Biswas, Saurabh Lodha
  • Patent number: 10043684
    Abstract: Systems and methods of etching a semiconductor substrate may include flowing an oxygen-containing precursor into a substrate processing region of a semiconductor processing chamber. The substrate processing region may house the semiconductor substrate, and the semiconductor substrate may include an exposed metal-containing material. The methods may include flowing a nitrogen-containing precursor into the substrate processing region. The methods may further include removing an amount of the metal-containing material.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: August 7, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Ranga Rao Arnepalli, Prerna Sonthalia Goradia, Robert Jan Visser, Nitin Ingle, Mikhail Korolik, Jayeeta Biswas, Saurabh Lodha
  • Patent number: 10043674
    Abstract: Exemplary methods for etching a germanium-containing material may include forming a plasma of a fluorine-containing precursor in a remote plasma region of a semiconductor processing chamber. The methods may include flowing effluents of the fluorine-containing precursor through apertures defined in a chamber component. The apertures may be coated with a catalytic material. The methods may include reducing a concentration of fluorine radicals in the plasma effluents with the catalytic material. The methods may also include delivering the plasma effluents to a processing region of the semiconductor processing chamber. A substrate having an exposed region of a germanium-containing material may be housed within the processing region. The methods may further include etching the germanium-containing material.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: August 7, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Mikhail Korolik, Nitin Ingle, Dimitri Kioussis
  • Publication number: 20180082849
    Abstract: The present disclosure provides methods for etching a silicon material in a device structure in semiconductor applications. In one example, a method for etching features in a silicon material includes performing a remote plasma process formed from an etching gas mixture including HF gas without nitrogen etchants to remove a silicon material disposed on a substrate.
    Type: Application
    Filed: November 27, 2017
    Publication date: March 22, 2018
    Inventors: Nitin K. INGLE, Anchuan WANG, Zihui LI, Mikhail KOROLIK
  • Patent number: 9875907
    Abstract: Methods of etching silicon nitride faster than silicon oxide are described. Exposed portions of silicon nitride and silicon oxide may both be present on a patterned substrate. A self-assembled monolayer (SAM) is selectively deposited over the silicon oxide but not on the exposed silicon nitride. Molecules of the self-assembled monolayer include a head moiety and a tail moiety, the head moiety forming a bond with the OH group on the exposed silicon oxide portion and the tail moiety extending away from the patterned substrate. A subsequent gas-phase etch using anhydrous vapor-phase HF may then be used to selectively remove silicon nitride much faster than silicon oxide because the SAM has been found to delay the etch and reduce the etch rate.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: January 23, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Fei Wang, Mikhail Korolik, Nitin K. Ingle, Anchuan Wang, Robert Jan Visser
  • Patent number: 9859128
    Abstract: Methods of etching silicon nitride faster than silicon or silicon oxide are described. Methods of selectively depositing additional material onto the silicon nitride are also described. Exposed portions of silicon nitride and silicon oxide may both be present on a patterned substrate. A self-assembled monolayer (SAM) is selectively deposited over the silicon oxide but not on the exposed silicon nitride. Molecules of the self-assembled monolayer include a head moiety and a tail moiety, the head moiety forming a bond with the OH group on the exposed silicon oxide portion and the tail moiety extending away from the patterned substrate. A subsequent exposure to an etchant or a deposition precursor may then be used to selectively remove silicon nitride or to selectively deposit additional material on the silicon nitride.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: January 2, 2018
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Fei Wang, Mikhail Korolik, Nitin K. Ingle, Anchuan Wang, Robert Jan Visser
  • Patent number: 9831097
    Abstract: The present disclosure provides methods for etching a silicon material in a device structure in semiconductor applications. In one example, a method for etching features in a silicon material includes performing a remote plasma process formed from an etching gas mixture including HF gas without nitrogen etchants to remove a silicon material disposed on a substrate.
    Type: Grant
    Filed: February 15, 2016
    Date of Patent: November 28, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Nitin K. Ingle, Anchuan Wang, Zihui Li, Mikhail Korolik
  • Publication number: 20170178915
    Abstract: The present disclosure provides methods for etching a silicon material in a device structure in semiconductor applications. In one example, a method for etching features in a silicon material includes performing a remote plasma process formed from an etching gas mixture including HF gas without nitrogen etchants to remove a silicon material disposed on a substrate.
    Type: Application
    Filed: February 15, 2016
    Publication date: June 22, 2017
    Inventors: Nitin K. INGLE, Anchuan WANG, Zihui LI, Mikhail KOROLIK
  • Publication number: 20170148642
    Abstract: Methods of etching silicon nitride faster than silicon or silicon oxide are described. Methods of selectively depositing additional material onto the silicon nitride are also described. Exposed portions of silicon nitride and silicon oxide may both be present on a patterned substrate. A self-assembled monolayer (SAM) is selectively deposited over the silicon oxide but not on the exposed silicon nitride. Molecules of the self-assembled monolayer include a head moiety and a tail moiety, the head moiety forming a bond with the OH group on the exposed silicon oxide portion and the tail moiety extending away from the patterned substrate. A subsequent exposure to an etchant or a deposition precursor may then be used to selectively remove silicon nitride or to selectively deposit additional material on the silicon nitride.
    Type: Application
    Filed: October 28, 2016
    Publication date: May 25, 2017
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Fei Wang, Mikhail Korolik, Nitin K. Ingle, Anchuan Wang, Robert Jan Visser
  • Publication number: 20170148640
    Abstract: Methods of etching silicon nitride faster than silicon oxide are described. Exposed portions of silicon nitride and silicon oxide may both be present on a patterned substrate. A self-assembled monolayer (SAM) is selectively deposited over the silicon oxide but not on the exposed silicon nitride. Molecules of the self-assembled monolayer include a head moiety and a tail moiety, the head moiety forming a bond with the OH group on the exposed silicon oxide portion and the tail moiety extending away from the patterned substrate. A subsequent gas-phase etch using anhydrous vapor-phase HF may then be used to selectively remove silicon nitride much faster than silicon oxide because the SAM has been found to delay the etch and reduce the etch rate.
    Type: Application
    Filed: August 11, 2016
    Publication date: May 25, 2017
    Inventors: Fei Wang, Mikhail Korolik, Nitin K. Ingle, Anchuan Wang, Robert Jan Visser
  • Patent number: 9576809
    Abstract: Methods of selectively etching silicon relative to silicon germanium are described. The methods include a remote plasma etch using plasma effluents formed from a fluorine-containing precursor and a hydrogen-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents react with the silicon. The plasmas effluents react with exposed surfaces and selectively remove silicon while very slowly removing other exposed materials. The methods are useful for removing Si(1-X)GeX faster than Si(1-Y)GeY, for X<Y. In some embodiments, the silicon germanium etch selectivity results partly from the presence of an ion suppression element positioned between the remote plasma and the substrate processing region.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: February 21, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Mikhail Korolik, Nitin K. Ingle, Jingchun Zhang, Anchuan Wang, Jie Liu
  • Patent number: 9478434
    Abstract: A method of removing titanium nitride hardmask is described. The hardmask resides above a low-k dielectric layer prior to removal and the low-k dielectric layer retains a relatively low net dielectric constant after the removal process. The low-k dielectric layer may be part of a dual damascene structure having copper at the bottom of the vias. A non-porous carbon layer is deposited prior to the titanium nitride hardmask removal to protect the low-k dielectric layer and the copper. The titanium nitride hardmask is removed with a gas-phase etch using plasma effluents formed in a remote plasma from a chlorine-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents react with the titanium nitride.
    Type: Grant
    Filed: November 17, 2014
    Date of Patent: October 25, 2016
    Assignee: Applied Materials, Inc.
    Inventors: Xikun Wang, Mandar Pandit, Zhenjiang Cui, Mikhail Korolik, Anchuan Wang, Nitin K. Ingle, Jie Liu