Abstract: An ion mobility analyser is disclosed having a gas flow directed along the ion travel axis and a set of electrodes to which DC voltages are applied to establish a DC field. The opposing forces of the gas flow and DC field cause ions to be trapped within a separation region in axial regions determined by their ion mobilities. A gas recirculator, having inlet and outlet ends respectively located downstream and upstream of the separation region, supplies at least fifty percent of the gas flow within the separation region, thereby reducing vacuum pumping requirements.

Abstract: An electrostatic ion trap or an array of electrostatic ion traps are provided having a longitudinal length of no more than 10 mm and/or at least one electrode with a capacitance to ground of no more than 1 pF. First and second sets of planar electrodes may be distributed along the longitudinal axis, at least some of the which are configured to receive an electrostatic potential for confinement of ions received in the space between the first and second sets of planar electrodes. An array may comprise an inlet for receiving an ion beam, configured such that a portion of the ion beam can be trapped in each of the ion traps. Signals indicative of ion mass and charge data may be obtained from multiple electrostatic ion traps in the array. This mass and charge data may be combined for identification of components of a mixture of different analyte ions.

Abstract: A method, software, and system for placing circuit elements and routing wires. The method, software, and system generally include the steps of (a) determining a boundary condition for signal paths between components in a circuit, wherein each of the components receives a clock signal and the signal paths include n wires and (n?1) circuit elements in alternating serial communication between the components, n being 2 or more; and (b) placing the circuit elements and routing the wires between the comments and the circuit elements such that no signal path in the circuit exceeds the boundary condition. In preferred embodiments, the boundary condition is a maximum length, and the method further includes placing the clocked components in a floor plan such that no signal path can exceed the boundary condition. The present invention advantageously ensures that timing requirements for signal paths between clocked circuit components are met automatically.

Abstract: A method, algorithm, software, architecture and system for placing circuit components and routing wires. The method and algorithm generally include (a) placing components in an array of allowed locations, wherein each of the components receives a clock signal and each of the allowed locations is about the same distance from a first nearest neighbor along at least a first axis as are other allowed locations along said first axis, and (b) one of the following: (i) independently routing a plurality of combinational paths from at least two components to at least two other components, (ii) routing the clock signal to the components, or both (i) and (ii). The present method, algorithm, software, architecture and system advantageously reduce power and/or current consumption in integrated circuits, improve uniformity of timing for signal paths between clocked circuit components, and/or ensure that timing requirements for signal paths between clocked circuit components are met automatically.