Patents by Inventor Mikihiko Komatsu

Mikihiko Komatsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160035706
    Abstract: A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
    Type: Application
    Filed: October 13, 2015
    Publication date: February 4, 2016
    Inventors: Mikihiko Komatsu, Takao Hidaka, Junko Kimura
  • Patent number: 9209113
    Abstract: A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: December 8, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Mikihiko Komatsu, Takao Hidaka, Junko Kimura
  • Publication number: 20150102501
    Abstract: A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
    Type: Application
    Filed: October 20, 2014
    Publication date: April 16, 2015
    Inventors: Mikihiko Komatsu, Takao Hidaka, Junko Kimura
  • Patent number: 9000574
    Abstract: A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: April 7, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Mikihiko Komatsu, Takao Hidaka, Junko Kimura
  • Publication number: 20120146245
    Abstract: A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
    Type: Application
    Filed: February 23, 2012
    Publication date: June 14, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Mikihiko Komatsu, Takao Hidaka, Junko Kimura
  • Patent number: 8134228
    Abstract: A voltage generated in any of a plurality of semiconductor chips is supplied to another chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. For example, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires respectively. In another example, fourth and fifth pad are disposed along a side different form a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: March 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Mikihiko Komatsu, Takao Hidaka, Junko Kimura
  • Publication number: 20100072604
    Abstract: To provide a technique of supplying a voltage generated in any of a plurality of semiconductor chips to the other chip as a power supply voltage to realize a stable operation of a semiconductor device in which the semiconductor chips are stacked in the same package. In an example of the main technique, two chips are stacked with each other, first to third pads are disposed along corresponding sides of the respective chips, which are arranged close and in parallel to each other, and these pads are commonly connected to each other with first to third metal wires, respectively. In another example, fourth and fifth pads are disposed along a side different from a side along which the first to third pads are disposed, and further connected to each other with a fourth metal wire directly between the chips.
    Type: Application
    Filed: June 23, 2009
    Publication date: March 25, 2010
    Applicant: RENESAS TECHNOLOGY CORP.
    Inventors: Mikihiko KOMATSU, Takao HIDAKA, Junko KIMURA