Patents by Inventor Mikihiro Shimada

Mikihiro Shimada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8531213
    Abstract: The present invention provides a CMOS-inverter-type frequency divider circuit that can further reduce power consumption. The CMOS-inverter-type frequency divider circuit includes: a plurality of CMOS inverters that contribute to realizing a frequency division function; a frequency division control section for performing control such that some or all of the plurality of CMOS inverters are intermittently driven at the respective different timings in accordance with an input signal; and a drive power supplying section for supplying powers for driving the plurality of CMOS inverters, and for, based on state information indicating whether VCO sub band selection or normal transmission is performed, switching some or all of the powers for the plurality of CMOS inverters between the VCO sub band selection and the normal transmission.
    Type: Grant
    Filed: April 8, 2010
    Date of Patent: September 10, 2013
    Assignee: Panasonic Corporation
    Inventors: Masakatsu Maeda, Mikihiro Shimada
  • Patent number: 8532591
    Abstract: A transmission circuit according to the present invention includes: an amplitude signal driving section (220) that generates a control voltage based on an amplitude signal in a high-output mode, and generates a control voltage at a predetermined level and a bias current based on the amplitude signal in a low-output mode; a variable gain adjustment section (114) that adjusts a power level of the phase signal; and a power amplifier (130) which amplitude-modulates the phase signal having the adjusted power level on the basis of the control voltage, in the high-output mode, and to a power supply terminal of which the control voltage is supplied and which amplitude-modulates the phase signal having the adjusted power level on the basis of the bias current, in the low-output mode.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: September 10, 2013
    Assignee: Panasonic Corporation
    Inventors: Mikihiro Shimada, Ryo Kitamura, Kaoru Ishida, Hiroshi Komori
  • Patent number: 8442153
    Abstract: A transmission circuit (100) according to the present invention includes an RF-IC (110), an EM-IC (120), and a power amplifier (130). The EM-IC (120) includes a DC-DC converter (123), a transistor (124), a low-dropout regulator (121), and a regulator output selector switch (122). After an elapse of a predetermined time from a time when an operation mode of the transmission circuit has switched from a polar modulation mode to a quadrature modulation mode to a time when a power supply voltage for the quadrature modulation mode output from the DC-DC converter (123) stabilizes at a desired value, the regulator output selector switch (122) switches a connection destination of a gate of the transistor (124) to a fixed potential, and outputs as a control voltage the power supply voltage for the quadrature modulation mode output from the DC-DC converter (123).
    Type: Grant
    Filed: May 19, 2010
    Date of Patent: May 14, 2013
    Assignee: Panasonic Corporation
    Inventors: Mikihiro Shimada, Kaoru Ishida, Hiroshi Komori
  • Patent number: 8396432
    Abstract: A transmitter circuit is provided which is capable of reducing modulation distortion even when an output power of a power amplifying section 141 is low. A signal generation section 11 generates an amplitude signal and a phase signal. A regulator 12 outputs a current based on the amplitude signal. A phase modulation section 13 phase-modulates the phase signal, and outputs a phase-modulated signal. The power amplifying section 141 receives the current which is based on the amplitude signal and supplied as a bias current from the regulator 12, and amplifies the phase-modulated signal by using the supplied current. Further, to the power amplifying section 141, a predetermined DC voltage is supplied as a collector voltage.
    Type: Grant
    Filed: April 1, 2010
    Date of Patent: March 12, 2013
    Assignee: Panasonic Corporation
    Inventors: Ryo Kitamura, Kaoru Ishida, Mikihiro Shimada, Hiroshi Komori
  • Publication number: 20120114075
    Abstract: A transmission circuit (100) according to the present invention includes an RF-IC (110), an EM-IC (120), and a power amplifier (130). The EM-IC (120) includes a DC-DC converter (123), a transistor (124), a low-dropout regulator (121), and a regulator output selector switch (122). After an elapse of a predetermined time from a time when an operation mode of the transmission circuit has switched from a polar modulation mode to a quadrature modulation mode to a time when a power supply voltage for the quadrature modulation mode output from the DC-DC converter (123) stabilizes at a desired value, the regulator output selector switch (122) switches a connection destination of a gate of the transistor (124) to a fixed potential, and outputs as a control voltage the power supply voltage for the quadrature modulation mode output from the DC-DC converter (123).
    Type: Application
    Filed: May 19, 2010
    Publication date: May 10, 2012
    Inventors: Mikihiro Shimada, Kaoru Ishida, Hiroshi Komori
  • Publication number: 20120108187
    Abstract: A transmitter circuit is provided which is capable of reducing modulation distortion even when an output power of a power amplifying section 141 is low. A signal generation section 11 generates an amplitude signal and a phase signal. A regulator 12 outputs a current based on the amplitude signal. A phase modulation section 13 phase-modulates the phase signal, and outputs a phase-modulated signal. The power amplifying section 141 receives the current which is based on the amplitude signal and supplied as a bias current from the regulator 12, and amplifies the phase-modulated signal by using the supplied current. Further, to the power amplifying section 141, a predetermined DC voltage is supplied as a collector voltage.
    Type: Application
    Filed: April 1, 2010
    Publication date: May 3, 2012
    Inventors: Ryo Kitamura, Kaoru Ishida, Mikihiro Shimada, Hiroshi Komori
  • Publication number: 20120106403
    Abstract: A transmission circuit according to the present invention includes: an amplitude signal driving section (220) that generates a control voltage based on an amplitude signal in a high-output mode, and generates a control voltage at a predetermined level and a bias current based on the amplitude signal in a low-output mode; a variable gain adjustment section (114) that adjusts a power level of the phase signal; and a power amplifier (130) which amplitude-modulates the phase signal having the adjusted power level on the basis of the control voltage, in the high-output mode, and to a power supply terminal of which the control voltage is supplied and which amplitude-modulates the phase signal having the adjusted power level on the basis of the bias current, in the low-output mode.
    Type: Application
    Filed: June 2, 2010
    Publication date: May 3, 2012
    Inventors: Mikihiro Shimada, Ryo Kitamura, Kaoru Ishida, Hiroshi Komori
  • Publication number: 20120094727
    Abstract: Provided is a power amplification circuit capable of quickly and highly accurately preventing an output power and a current of a power amplifier from fluctuating when an antenna load changes. A power amplifier 11 amplifies a radio frequency signal and obtains an output signal. A regulator 12 amplifies an input voltage by a predetermined gain and supplies an output voltage to the power amplifier 11. A current monitor 13 monitors an input current to the regulator 12 and obtains a monitor current. A first multiplier 14 multiplies the monitor current by the output voltage of the regulator 12 and obtains a monitor power. A memory 16 prestores a predetermined reference current. A second multiplier 15 multiplies the input voltage by the reference current and obtains a reference power. A gain control section 121 in the regulator 12 controls a predetermined gain based on the monitor power and the reference power.
    Type: Application
    Filed: October 8, 2010
    Publication date: April 19, 2012
    Inventors: Shigeru Morimoto, Kenichi Mori, Iwao Kojima, Kazuaki Takahashi, Mikihiro Shimada
  • Publication number: 20120058804
    Abstract: The present invention provides a CMOS-inverter-type frequency divider circuit that can further reduce power consumption. The CMOS-inverter-type frequency divider circuit includes: a plurality of CMOS inverters that contribute to realizing a frequency division function; a frequency division control section for performing control such that some or all of the plurality of CMOS inverters are intermittently driven at the respective different timings in accordance with an input signal; and a drive power supplying section for supplying powers for driving the plurality of CMOS inverters, and for, based on state information indicating whether VCO sub band selection or normal transmission is performed, switching some or all of the powers for the plurality of CMOS inverters between the VCO sub band selection and the normal transmission.
    Type: Application
    Filed: April 8, 2010
    Publication date: March 8, 2012
    Inventors: Masakatsu Maeda, Mikihiro Shimada
  • Patent number: 7746152
    Abstract: A switch circuit device with improved insertion loss characteristics and isolation characteristics is provided. The switch circuit of the present invention includes a plurality of n-ch MOSFETs whose gates are connected together and whose drains and sources are connected in series, a p-ch MOSFET whose gate is connected to the gates of the plurality of n-ch MOSFETs and whose drain is connected to the source and drain of at least one pair of adjacent n-ch MOSFETs, and a voltage changing circuit for applying a low voltage to the source of the p-ch MOSFET while a high-level control voltage is applied to the gate of the p-ch MOSFET, and a high voltage to the source of the p-ch MOSFET while a low-level control voltage is applied to the gate of the p-ch MOSFET.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: June 29, 2010
    Assignee: Panasonic Corporation
    Inventors: Toshifumi Nakatani, Mikihiro Shimada
  • Patent number: 7602877
    Abstract: A frequency divider in accordance with the present invention includes a plurality of latch circuits connected together in series to which a clock signal and an inversion clock signal are input, an inverter circuit to which an output signal from a last connected one of the latch circuits is input, an output terminal to which an output from the inverter circuit is connected, and a plurality of feedback paths that connect the output from the inverter circuit to respective inputs of the plurality of latch circuits. The frequency divider further includes a switching circuit that switches connections to the plurality of feedback paths so that an output signal from the inverter circuit is input to only one of the plurality of latch circuits.
    Type: Grant
    Filed: June 26, 2007
    Date of Patent: October 13, 2009
    Assignee: Panasonic Corporation
    Inventor: Mikihiro Shimada
  • Publication number: 20080068053
    Abstract: Conventional frequency dividers allowing a plurality of output signals with different frequency dividing ratios to be output require a plurality of frequency dividing circuits the number of which is equal to or greater than that of the output frequency dividing ratios. This increases the sizes and costs of the conventional frequency dividers. A frequency divider in accordance with the present invention includes a plurality of latch circuits connected together in series to which a clock signal and a clock inversion signal are input, an inverter circuit to which an output signal from a last connected one of the latch circuits is input, an output terminal to which an output from the inverter circuit is connected, and a plurality of feedback paths that connect the output from the inverter circuit to respective inputs of the plurality of latch circuits.
    Type: Application
    Filed: June 26, 2007
    Publication date: March 20, 2008
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Mikihiro Shimada
  • Publication number: 20070285149
    Abstract: A switch circuit device with improved insertion loss characteristics and isolation characteristics is provided. The switch circuit of the present invention includes a plurality of n-ch MOSFETs whose gates are connected together and whose drains and sources are connected in series, a p-ch MOSFET whose gate is connected to the gates of the plurality of n-ch MOSFETs and whose drain is connected to the source and drain of at least one pair of adjacent n-ch MOSFETs, and a voltage changing circuit for applying a low voltage to the source of the p-ch MOSFET while a high-level control voltage is applied to the gate of the p-ch MOSFET, and a high voltage to the source of the p-ch MOSFET while a low-level control voltage is applied to the gate of the p-ch MOSFET.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 13, 2007
    Inventors: Toshifumi Nakatani, Mikihiro Shimada
  • Patent number: 7184617
    Abstract: A portable device has a configuration such that a plurality of housings are connected functionally, wherein the thickness of a connection section between the housings is reduced so that the portability is improved. The portable device includes a first housing; a first board provided in the first housing; a second housing; a second board provided in the second housing; a connection section for connecting the first housing with the second housing in such a manner that their relative position can be changed; and an optical waveguide film having at least one optical waveguide for connecting the first board with the second board through optical wiring.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: February 27, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsuguhiro Korenaga, Kunio Hibino, Nobuki Itoh, Mikihiro Shimada, Yoshihiro Tomita, Yasushi Nakagiri, Satoru Tomekawa, Seiji Karashima
  • Patent number: 7024087
    Abstract: A first substrate on which an optical-waveguide groove is formed and a second substrate. The second substrate is bonded to the plane of the first substrate on which the optical-waveguide groove is formed by a material having a refractive index higher than those of the first substrate and second substrate. The optical-waveguide groove is filled with the material, and the refractive index of the first substrate is different from the refractive index of the second substrate.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: April 4, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mikihiro Shimada, Tsuguhiro Korenaga, Masanori Iida, Hiroyuki Asakura
  • Patent number: 6964528
    Abstract: An optical mount substrate and a manufacturing method of the optical mount substrate. An optical fiber guide section for arranging and fixing an optical transfer section, having an optical waveguide or an optical fiber, is formed. An electrical conductivity member is embedded in the optical mount substrate so that it penetrates a first principal plane of an arrangement section for arranging an optical device optically connected with the optical waveguide or the optical fiber on the first principal plane, and a second principal plane of the arrangement section parallel to the first principal plane. The optical fiber guide section and the arrangement section are formed by pressing a mold member to a heated and softened substrate to transfer inversion geometry of the mold member onto the substrate. The electrical conductivity member, having a predetermined shape, is directly pressed onto the heated and softened substrate to embed it into the substrate.
    Type: Grant
    Filed: August 9, 2001
    Date of Patent: November 15, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tsuguhiro Korenaga, Hiroyuki Asakura, Masanori Iida, Hisashi Adachi, Mikihiro Shimada
  • Patent number: 6946926
    Abstract: A wired transmission path includes first and second differential transmission paths. The first differential transmission path is composed of two strip lines, and the second differential transmission path is composed of two strip lines. Each of the strip lines of the first differential transmission path is disposed at an equal distance from the strip lines of the second differential transmission path. Thus, there is provided a wired transmission path including a plurality of differential transmission paths in such a manner so as to cancel crosstalk.
    Type: Grant
    Filed: February 19, 2003
    Date of Patent: September 20, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mikihiro Shimada, Kaoru Ishida, Hiroyuki Asakura
  • Publication number: 20050201693
    Abstract: Provided is a portable device having such a configuration that a plurality of housings are connected functionally, wherein the thickness of a connection section between the housings is reduced so that the portability is improved. The portable device comprising: a first housing; a first board provided in the first housing; a second housing; a second board provided in the second housing; a connection section for connecting the first housing with the second housing in such a manner that the irrelative position can be changed; and an optical waveguide film having at least one optical waveguide for connecting the first board with the second board through optical wiring.
    Type: Application
    Filed: March 10, 2005
    Publication date: September 15, 2005
    Inventors: Tsuguhiro Korenaga, Kunio Hibino, Nobuki Itoh, Mikihiro Shimada, Yoshihiro Tomita, Yasushi Nakagiri, Satoru Tomekawa, Seiji Karashima
  • Publication number: 20050175345
    Abstract: A wavelength multiplexing device has an emitter capable of independently emitting at least two optical signals for at least two kinds of wavelength, respectively and a transmitter including a plurality of optical waveguides into which the optical signals emitted by the emitter are coupled and which independently transmit the coupled optical signals, respectively. While coupling optical signals with the same wavelength among the optical signals emitted by the emitter into the optical waveguides different from each other, the transmitter couples optical signals with wavelengths different from each other into a same optical waveguide.
    Type: Application
    Filed: January 25, 2005
    Publication date: August 11, 2005
    Inventors: Mikihiro Shimada, Nobuki Itoh, Tsuguhiro Korenaga, Kunio Hibino
  • Patent number: 6904220
    Abstract: An optical module of the present invention includes a first substrate 1, a second substrate 2, a PD 3, a LD 4, and an optical fiber 5. The first substrate 1 has a first optical waveguide core 1c formed therein. The second substrate 2 has a second optical waveguide core 2c formed therein. The first optical waveguide core 1c and the second optical waveguide core 2c form an optical connecting portion where the first substrate 1 and the second substrate 2 are bonded to each other. The LD 4 is capable of transmitting an optical signal via the second optical waveguide core 2c and the optical fiber 5. The PD 3 is capable of receiving an optical signal which enters the second optical waveguide core 2c from the optical fiber 5, and propagates through the first optical waveguide core 1c via the optical connecting portion formed between the first optical waveguide core 1c and the second optical waveguide core 2c.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: June 7, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mikihiro Shimada, Hiroyuki Asakura