Patents by Inventor Mikihiro Tanaka

Mikihiro Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146031
    Abstract: The present technology provides a surface emitting laser capable of performing current confinement at least in a tunnel junction layer while suppressing the characteristic change of the tunnel junction layer. The surface emitting laser according to the present technology includes: first and second reflectors; and a resonator disposed between the first and second reflectors, the resonator including an active layer and a tunnel junction layer, in which, in the resonator, a peripheral portion has higher resistance than a central portion at least in an entire region in a thickness direction of the tunnel junction layer. According to the surface emitting laser according to the present technology, it is possible to provide a surface emitting laser capable of performing current confinement at least in a tunnel junction layer while suppressing the characteristic change of the tunnel junction layer.
    Type: Application
    Filed: January 21, 2022
    Publication date: May 2, 2024
    Inventors: MICHINORI SHIOMI, MASAYUKI TANAKA, TOMOMASA WATANABE, MIKIHIRO YOKOZEKI
  • Publication number: 20100245346
    Abstract: This invention improves the convenience of viewing three-dimensional image displays. A mobile communications handset can accomplish three-dimensional image displays using image data received by a communications unit and a broadcast reception unit through a display unit provided with a parallax barrier panel. A control unit automatically performs actions to record the image data as an auxiliary recording while the three-dimensional image display is being performed when the three-dimensional image display is performed using the received image data. That is to say, recording of image data relating to the three-dimensional image display is performed automatically in preparation for cases where the display cannot be viewed three-dimensionally due to viewing conditions.
    Type: Application
    Filed: February 22, 2010
    Publication date: September 30, 2010
    Applicant: Casio Hitachi Mobile Communications Co., Ltd.
    Inventors: Mikihiro Tanaka, Manabu Yano, Kazuharu Tanaike
  • Publication number: 20040235485
    Abstract: A method for allocating an frequency band to a wireless communication system, comprising the steps of: detecting frequencies being used by the other wireless systems to search an idle frequency band adapted to a new occupied band to be allocated from among idle frequency bands; deciding a main frequency of the occupied band within the detected idle frequency band; and repeating the detection of the idle frequency band and the decision of the main frequency for the occupied band with a reduced width when there is no idle frequency band adapted to the occupied band and if the width of the occupied band to be set is changeable.
    Type: Application
    Filed: January 23, 2004
    Publication date: November 25, 2004
    Applicant: Hitachi, Ltd.
    Inventor: Mikihiro Tanaka
  • Patent number: 6769045
    Abstract: There is provided a technology for realizing an PCI expansion adapter for a PC card which is connectable to a desktop type personal computer PCI expansion connector using a low profile PCI. The PCI expansion adapter includes an expansion unit which is provided with an electrical connector to a PCI bus, a low profile PCI expansion board provided with a PC card control element and an electrical connector to the PC card, wherein the low profile PCI expansion board and the expansion unit are connected by the electrical connectors mounted on the respective boards.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: July 27, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Mikihiro Tanaka, Kenichi Yoshida, Hiroyuki Inokuchi, Takashi Maruyama, Kazuma Kishi, Hironori Oikawa, Hiroshi Ito, Hitoshi Yokota
  • Patent number: 6593063
    Abstract: A first resist layer, capable of generating an acid, is formed on a semiconductor base layer and is developed in a shortened developing time than usual. The first resist pattern is covered with a second resist layer containing a material capable of crosslinkage in the presence of an acid. The acid is generated in the first resist pattern by application of heat or by exposure to light, and a crosslinked layer is formed in the second resist pattern at the interface with the first resist pattern as a cover layer for the first resist pattern, thereby the first resist pattern is caused to be thickened. The non linked portion of the second resist layer is removed and the fine resist pattern is formed. Thus, the hole diameter of the resist pattern can be reduced, or the isolation width of a resist pattern can be reduced.
    Type: Grant
    Filed: February 28, 2000
    Date of Patent: July 15, 2003
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Mikihiro Tanaka, Takeo Ishibashi
  • Patent number: 6527562
    Abstract: There is provided a technology for realizing an PCI expansion adapter for a PC card which is connectable to a desktop type personal computer PCI expansion connector using a low profile PCI. The PCI expansion adapter includes an expansion unit which is provided with an electrical connector to a PCI bus, a low profile PCI expansion board provided with a PC card control element and an electrical connector to the PC card, wherein the low profile PCI expansion board and the expansion unit are connected by the electrical connectors mounted on the respective boards.
    Type: Grant
    Filed: September 11, 2001
    Date of Patent: March 4, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Mikihiro Tanaka, Kenichi Yoshida, Hiroyuki Inokuchi, Takashi Maruyama, Kazuma Kishi, Hironori Oikawa, Hiroshi Ito, Hitoshi Yokota
  • Publication number: 20020064974
    Abstract: There is provided a technology for realizing an PCI expansion adapter for a PC card which is connectable to a desktop type personal computer PCI expansion connector using a low profile PCI. The PCI expansion adapter includes an expansion unit which is provided with an electrical connector to a PCI bus, a low profile PCI expansion board provided with a PC card control element and an electrical connector to the PC card, wherein the low profile PCI expansion board and the expansion unit are connected by the electrical connectors mounted on the respective boards.
    Type: Application
    Filed: September 11, 2001
    Publication date: May 30, 2002
    Inventors: Mikihiro Tanaka, Kenichi Yoshida, Hiroyuki Inokuchi, Takashi Maruyama, Kazuma Kishi, Hironori Oikawa, Hiroshi Ito, Hitoshi Yokota
  • Publication number: 20020065970
    Abstract: There is provided a technology for realizing an PCI expansion adapter for a PC card which is connectable to a desktop type personal computer PCI expansion connector using a low profile PCI. The PCI expansion adapter includes an expansion unit which is provided with an electrical connector to a PCI bus, a low profile PCI expansion board provided with a PC card control element and an electrical connector to the PC card, wherein the low profile PCI expansion board and the expansion unit are connected by the electrical connectors mounted on the respective boards.
    Type: Application
    Filed: September 12, 2001
    Publication date: May 30, 2002
    Inventors: Mikihiro Tanaka, Kenichi Yoshida, Hiroyuki Inokuchi, Takashi Maruyama, Kazuma Kishi, Hironori Oikawa, Hiroshi Ito, Hitoshi Yokota
  • Patent number: 6376157
    Abstract: In a method of manufacturing a semiconductor device, a first resist pattern, which evolves an acid, is formed on a semiconductor substrate. The first resist pattern is treated with a chemical solution containing a crosslinking agent and a swelling promoter. The crosslinking agent is capable to bring about crosslinking in the presence of an acid at the surface layer of the first resist pattern. The crosslinking agent and swelling promoter in the chemical solution permeate into the surface layer of the first resist pattern, thereby swells the surface layer. The chemical solution is removed from the surface of the first resist pattern. The first resist pattern is caused to evolve an acid, by which a crosslinked film is formed in the swollen surface layer of the first resist pattern. Thus, a second resist pattern is formed, and the semiconductor substrate is etched through the second resist pattern as a mask.
    Type: Grant
    Filed: March 31, 2000
    Date of Patent: April 23, 2002
    Assignees: Mitsubishi Denki Kabushiki Kaisha, Ryoden Semiconductor System Engineering Corporation
    Inventors: Mikihiro Tanaka, Takeo Ishibashi
  • Patent number: 6266242
    Abstract: The present invention provides an information processing apparatus that may be designed in small and thin size and a small and thin CPU module that has a high heat releasing effect and is suitable therefor. The CPU module includes a processor, a connector to be electrically connected to the outside, a system control circuit for controlling transfer of a signal between the processor and the connector, and a printed board on which the processor, the connector and the system control circuit are mounted. The CPU module further provides a heat release plate one side of which is pasted with the printed board and the other side of which is substantially planar. The printed board has a cavity formed therein so that the processor may be fitted in the cavity in a bare-chip state. One side of the bare chip is jointed with the heat release plate.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: July 24, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Maruyama, Akira Yamagiwa, Ryoichi Kurihara, Masakazu Sakaue, Yasuhiro Uemura, Mikihiro Tanaka
  • Patent number: 6069793
    Abstract: The present invention provides an information processing apparatus that may be designed in small and thin size and a small and thin CPU module that has a nigh heat releasing effect and is suitable therefor. The CPU module includes a processor, a connector to be electrically connected to the outside, a system control circuit for controlling transfer of a signal between the processor and the connector, and a printed board on which the processor, the connector and the system control circuit are mounted. The CPU module further provides a heat release plate one side of which is pasted with the printed board and the other side of which is substantially planar. The printed board has a cavity formed therein so that the processor may be fitted in the cavity in a bare-chip state. One side of the bare chip is jointed with the heat release plate.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: May 30, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Maruyama, Akira Yamagiwa, Ryoichi Kurihara, Masakazu Sakaue, Yasuhiro Uemura, Mikihiro Tanaka