Patents by Inventor Mikinori Amisawa

Mikinori Amisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935674
    Abstract: An object is to provide a laminated varistor excellent in clamping voltage ratio. Laminated varistor includes at least a pair of internal electrodes provided in varistor layer containing ZnO as a main component. Internal electrode contains Ag as a main component and is made of a metal containing at least one type selected from Pt and Au. The total weight of Pt and Au with respect to the weight of the metal constituting internal electrode is set between 2% and 30% (inclusive). With such a configuration, diffusion of Ag into varistor layer can be prevented, and a laminated varistor excellent in clamping voltage ratio can be obtained.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Mikinori Amisawa, Masuto Omiya, Kouji Hirate, Yukihito Yamashita, Touichi Makita
  • Publication number: 20210327617
    Abstract: An object is to provide a laminated varistor excellent in clamping voltage ratio. Laminated varistor includes at least a pair of internal electrodes provided in varistor layer containing ZnO as a main component. Internal electrode contains Ag as a main component and is made of a metal containing at least one type selected from Pt and Au. The total weight of Pt and Au with respect to the weight of the metal constituting internal electrode is set between 2% and 30% (inclusive). With such a configuration, diffusion of Ag into varistor layer can be prevented, and a laminated varistor excellent in clamping voltage ratio can be obtained.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 21, 2021
    Inventors: MIKINORI AMISAWA, MASUTO OMIYA, KOUJI HIRATE, YUKIHITO YAMASHITA, TOUICHI MAKITA
  • Publication number: 20130335189
    Abstract: An electrostatic discharge (ESD) protector includes a first high heat-conductive substrate, a second high heat-conductive substrate, a varistor layer, and a plurality of via-hole electrodes. The first high heat-conductive substrate is provided with a plurality of first through-holes. The second high heat-conductive substrate is provided with a plurality of second through-holes. The varistor layer that is mainly composed of zinc oxide is disposed between the first high heat-conductive substrate and the second high heat-conductive substrate. The varistor layer includes internal electrodes. Each of via-hole electrodes penetrates the varistor layer and fills both one of the first through-holes and one of the second through-holes to couple both the ones to each other.
    Type: Application
    Filed: April 16, 2012
    Publication date: December 19, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Yuuichi Abe, Kenji Oka, Fuyuki Abe, Kazuhiro Miura, Mikinori Amisawa, Atsumi Miyakawa, Takahiro Senshu, Yuji Yamagishi, Jun Ootsuki
  • Patent number: 8400254
    Abstract: A surge absorbing element has a first electrode, a second electrode, and a ceramic layer. The second electrode is opposed to the first electrode. The ceramic layer has a polycrystal structure including a plurality of crystal grains showing voltage nonlinearity, and is at least partially brought into contact with the first electrode and the second electrode. The ceramic layer has a void inside therein, and surface discharge is generated on surfaces, exposed to the void, of the crystal grains, whereby electric conduction is attained between the first and second electrodes.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: March 19, 2013
    Assignee: Panasonic Corporation
    Inventors: Eiichi Koga, Noriko Sawada, Mikinori Amisawa, Seiichi Minami, Hirofumi Yamada, Tomohisa Okimoto
  • Publication number: 20110304946
    Abstract: A surge absorbing element has a first electrode, a second electrode, and a ceramic layer. The second electrode is opposed to the first electrode. The ceramic layer has a polycrystal structure including a plurality of crystal grains showing voltage nonlinearity, and is at least partially brought into contact with the first electrode and the second electrode. The ceramic layer has a void inside therein, and surface discharge is generated on surfaces, exposed to the void, of the crystal grains, whereby electric conduction is attained between the first and second electrodes.
    Type: Application
    Filed: April 13, 2010
    Publication date: December 15, 2011
    Inventors: Eiichi Koga, Noriko Sawada, Mikinori Amisawa, Seiichi Minami, Hirofumi Yamada, Tomohisa Okimoto