Patents by Inventor Mikio Hongo

Mikio Hongo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020180926
    Abstract: shorting defects between the scan lines and signal lines are repaired during the manufacture of a TFT or other flat panel display unit without causing liquid crystal orientation defects and production yield is thereby improved. In a TFT panel in which the scan line 2 bifurcates where the scan line 2 and signal line 3 intersect with the protective insulation film 8 therebetween, one leg of the bifurcation of the scan line 2 where a short 7 is found between lines at the intersection is cut by a laser 9, thereby electrically separating the short. An insulation film material 13 is then supplied from a glass pipette 12 locally to the cut part and surrounding area and cured to form a new insulation film.
    Type: Application
    Filed: August 31, 2001
    Publication date: December 5, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Michinobu Mizumura, Mikio Hongo, Masaaki Okunaka, Kaoru Yamada
  • Patent number: 5883437
    Abstract: A method and apparatus for inspecting wirings of an electronic circuit substrate to detect a defect in the wiring and for enabling correction thereof. The inspection method and apparatus include electrostatically coupling at least one electrode to a wiring pattern, applying a time varying voltage between the electrode and wiring pattern at different locations so as to detect a current flow and determine a defect by a variation in the detected current flow at the different locations and a portion of the defect. A defect in the form of a disconnected or half-disconnected point of the wiring may be corrected by supplying a solution of a metal complex to the disconnected or half-disconnected point, heating the solution and end point areas of the disconnected or half-disconnected point by laser light and precipitating a metal thin film establishing a connection of the wiring.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: March 16, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Shigenobu Maruyama, Mikio Hongo, Satoru Todoroki, Masaaki Okunaka, Hideo Matsuzaki, Takanori Ninomiya, Kazushi Yoshimura, Fumikazu Ito
  • Patent number: 5832595
    Abstract: A method of modifying an electronic circuit board by performing disconnection or connection of conductive lines at a specified or an arbitrary position of the conductive lines of the electronic circuit board thereby changing an electric circuit and of completely modifying an open pattern defect of the conductive lines or an insulator layer, and its device, wherein a first energy beam is irradiated to portions of repair terminals 9 and 9' which are intended to connect or disconnect, of conductive lines 5 and 5' in the electronic circuit board thereby removing a protection layer, making windows and exposing the terminals 9 and 9' for connection; a second energy beam is irradiated thereby disconnecting the repair terminals 9 and 9', or a metal piece for connecting is supplied to between the repair terminals 9 and 9' and applying an energy thereto thereby electrically connecting them; and the disconnected or connected windowed portion is locally coated with the insulator layer thereby modifying the conductive lin
    Type: Grant
    Filed: June 14, 1994
    Date of Patent: November 10, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Shigenobu Maruyama, Mikio Hongo, Haruhisa Sakamoto, Tateoki Miyauchi, Ryohei Satoh, Kiyoshi Matsui, Shinichi Kazui, Kaoru Katayama, Hiroshi Fukuda
  • Patent number: 5824598
    Abstract: An IC wiring connecting method for interconnecting conductive lines of the same wiring plane of an IC chip for correcting the wiring, for interconnecting conductive lines of different wiring lanes of a multilayer IC chip at the same position, or for connecting a conductive line of a lower wiring plane of a multilayer IC chip to a conductive line formed at a separate position on the same multilayer IC chip. The insulating film or films covering conductive lines to be interconnected are processed by an energy beam such as a concentrated ion beam to form holes so as to expose the respective parts of the conductive lines where the conductive lines are to be interconnected, then a metal is deposited over the surfaces of the holes and an area interconnecting the holes by irradiating the surfaces of the holes and the area by an energy beam or a concentrated ion beam in an atmosphere of a gaseous organic metal compound to form a conductive metal film electrically interconnecting the conductive lines.
    Type: Grant
    Filed: November 21, 1995
    Date of Patent: October 20, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Yamaguchi, Mikio Hongo, Tateoki Miyauchi, Akira Shimase, Satoshi Haraichi, Takahiko Takahashi, Keiya Saito
  • Patent number: 5497034
    Abstract: An IC wiring connecting method for interconnecting conductive lines of the same wiring plane of an IC chip for correcting the wiring, for interconnecting conductive lines of different wiring lanes of a multilayer IC chip at the same position, or for connecting a conductive line of a lower wiring plane of a multilayer IC chip to a conductive line formed at a separate position on the same multilayer IC chip. The insulating film or films covering conductive lines to be interconnected are processed by an energy beam such as a concentrated ion beam to form holes so as to expose the respective parts of the conductive lines where the conductive lines are to be interconnected, then a metal is deposited over the surfaces of the holes and an area interconnecting the holes by irradiating the surfaces of the holes and the area by an energy beam or a concentrated ion beam in an atmosphere of a gaseous organic metal compound to form a conductive metal film electrically interconnecting the conductive lines.
    Type: Grant
    Filed: October 5, 1994
    Date of Patent: March 5, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Yamaguchi, Mikio Hongo, Tateoki Miyauchi, Akira Shimase, Satoshi Haraichi, Takahiko Takahashi, Keiya Saito
  • Patent number: 5472507
    Abstract: An IC wiring connecting method for interconnecting conductive lines of the same wiring plane of an IC chip for correcting the wiring, for interconnecting conductive lines of different wiring lanes of a multilayer IC chip at the same position, or for connecting a conductive line of a lower wiring plane of a multilayer IC chip to a conductive line formed at a separate position on the same multilayer IC chip. The insulating film or films covering conductive lines to be interconnected are processed by an energy beam such as a concentrated ion beam to form holes so as to expose the respective parts of the conductive lines where the conductive lines are to be interconnected, then a metal is deposited over the surfaces of the holes and an area interconnecting the holes by irradiating the surfaces of the holes and the area by an energy beam or a concentrated ion beam in an atmosphere of a gaseous organic metal compound to form a conductive metal film electrically interconnecting the conductive lines.
    Type: Grant
    Filed: May 6, 1994
    Date of Patent: December 5, 1995
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Yamaguchi, Mikio Hongo, Tateoki Miyauchi, Akira Shimase, Satoshi Haraichi, Takahiko Takahashi, Keiya Saito
  • Patent number: 5229569
    Abstract: A laser machining apparatus includes a laser beam source, such as of excimer laser, which produces a laser beam to be projected on a work piece or a sample, first and second illumination light sources which have wavelengths substantially equal to the wavelength of the laser beam and illuminate the entire image and the laser beam, respectively, a first beam splitter which guides the image produced by the illumination light to an observation unit, a second beam splitter which guides the laser beam from the laser beam source to an objective lens, and a controller which controls the machining condition including the relative positioning between the sample and the laser beam depending on the result of observation. The laser beam guide path structure from the laser beam source to the sample has its interior wall made of laser-transparent material such as glass, and the transparent material is enclosed by a laser blocking material such as a metal or water.
    Type: Grant
    Filed: May 30, 1991
    Date of Patent: July 20, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Tateoki Miyauchi, Shigenobu Maruyama, Katsurou Mizukoshi, Mikio Hongo, Koyo Morita, Kaoru Katayama, Minoru Suzuki, Kazuo Mera, Haruhisa Sakamoto
  • Patent number: 5208437
    Abstract: In an interconnection film cutting method and apparatus therefor according to the present invention, a laser beam having a pulse width of 10.sup.-9 second or less is illuminated on a desired portion of the interconnection pattern of a semiconductor device, such as a link used for redundant operation of a defective bit in, for example, a LSI memory, or on a desired portion of the interconnection pattern of a large-scaled interconnection substrate through a transmission type liquid crystal mask in the form of a desired pattern so as to cut the interconnection pattern without damaging a layer disposed below the interconnection pattern.
    Type: Grant
    Filed: May 9, 1991
    Date of Patent: May 4, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Tateoki Miyauchi, Mikio Hongo, Shigenobu Maruyama, Katsurou Mizukoshi, Hiroshi Yamaguchi, Koyo Morita
  • Patent number: 5182231
    Abstract: The wiring of a semiconductor device having a multilayer interconnection on a semiconductor substrate is modified. A plurality of fine holes are formed on an insulation film by the radiation of a converged energy beam to expose selected ones of the internal lines of the underlying wiring. A thin buffer film of Cr, Ti, TiN, or W is formed along a path where an additional connection line is to be deposited. The path extends along an upper surface of the insulating film at least in and between the said fine holes. The additional connection line is deposited on the buffer film by energy beam CVD, using Mo, W, or Al, to interconnect the exposed internal lines. The additional connection line is annealed by radiating an energy beam thereon to reduce its resistance. A further insulating film is deposited covering the additional connection line by energy beam CVD.
    Type: Grant
    Filed: May 23, 1990
    Date of Patent: January 26, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Mikio Hongo, Katsuro Mizukoshi, Shyuzo Sano, Takashi Kamimura, Takahiko Takahashi
  • Patent number: 5086015
    Abstract: A method of etching a semiconductor device having multi-layered wiring by an ion beam is disclosed which method comprises the steps of: extracting a high-intensity ion beam from a high-density ion source; focusing the extracted ion beam; causing the focused ion beam to perform a scanning operation by a voltage applied to a deflection electrode; forming a first hole in the semiconductor device by the focused ion beam to a depth capable of reaching an insulating film formed between upper and lower wiring conductors so that the first hole has a curved bottom corresponding to the undulation of the upper wiring conductor, and the upper wiring conductor is absent at the bottom of the first hole; and scanning a portion of the bottom of the first hole with the focused ion beam to form a second hole in the insulating film to a depth capable of reaching the lower wiring conductor, thereby preventing the shorting between the upper and lower wiring conductors.
    Type: Grant
    Filed: August 15, 1989
    Date of Patent: February 4, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Fumikazu Itoh, Akira Shimase, Satoshi Haraichi, Takahiko Takahashi, Mikio Hongo
  • Patent number: 5026664
    Abstract: A semiconductor IC device having a substrate, a patterned conductor layer for interconnection of regions in the substrate and a passivation layer covering the device is provided with an additional conduction path of a pattern and/or part of the patterned conductor layer is removed for disconnection for the purpose of evaluation of the characteristics of the device. The additional conduction path is formed by forming a hole in the passivation layer to expose a part of the conductor layer, directing, in an atmosphere containing a metal compound gas, an ion beam onto the hole and onto a predetermined portion of the passivation layer on which the additional conduction path of a pattern is to be formed to thereby form a patterned film of the metal decomposed from the metal compound gas and forming an additional conductor on the patterned film.
    Type: Grant
    Filed: April 6, 1989
    Date of Patent: June 25, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Mikio Hongo, Katsuro Mizukoshi, Shuzo Sano, Takashi Kamimura, Fumikazu Itoh, Akira Shimase, Satoshi Haraichi, Takahiko Takahashi
  • Patent number: 4900695
    Abstract: The present invention relates to a semiconductor integrated circuit device and a process for producing the same. A hole is bored in an insulating film above a portion of a wiring which is to be connected to another wiring by means of a focused ion beam. The inside of the hole and a predetermined region on the insulating film are irradiated with either a laser beam or an ion beam in a metal compound gas to deposit metal in the hole and on said region and a connecting wiring is formed by means of optically pumped CVD. To electrically connect upper- and lower-level wirings in a multilayer wiring structure by a connecting wiring, the connecting wiring is electrically isolated from an intermediate-level wiring through which it extends. The above-described arrangement enables provision of a hole with a focused ion beam and formation of a metal wiring on a selective region by means, for example, optically pumped CVD.
    Type: Grant
    Filed: December 17, 1987
    Date of Patent: February 13, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Takahiko Takahashi, Funikazu Itoh, Akira Shimase, HIroshi Yamaguchi, Mikio Hongo, Satoshi Haraichi
  • Patent number: 4868068
    Abstract: A IC wiring connecting method for interconnecting conductive lines of the same wiring plane of an IC chip for correcting the wiring, for interconnecting conductive lines of different wiring lanes of a multilayer IC chip at the same position, or for connecting a conductive line of a lower wiring plane of a multilayer IC chip to a conductive line formed at a separate position on the same multilayer IC chip. The insulating film or films covering conductive lines to be interconnected are processed by an energy beam such as a concentrated ion beam to form holes so as to expose the respective parts of the conductive lines where the conductive lines are to be interconnected, then a metal is deposited over the surfaces of the holes and an area interconnecting the holes by irradiating the surfaces of the holes and the area by an energy beam or a concentrated ion beam in an atmosphere of a gaseous organic metal compound to form a conductive metal film electrically interconnecting the conductive lines.
    Type: Grant
    Filed: March 31, 1987
    Date of Patent: September 19, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Yamaguchi, Mikio Hongo, Tateoki Miyauchi, Akira Shimase, Satoshi Haraichi, Takahiko Takahashi, Keiya Saito
  • Patent number: 4795720
    Abstract: Herein disclosed are a method of producing a semiconductor device. Especially in a device constructed to have a defective circuit replaced by a redundant circuit, after a fuse is cut by exposure to a laser beam, a portion to be fused is irradiated in a predetermined gas atmosphere with an optical ray to selectively form a CVD film thereby to form a protection film over the fuse so that the formation of the protection film is simplified after the fuse is cut, whereby any rise in the production cost is suppressed while improving the production yield and reliability.
    Type: Grant
    Filed: September 14, 1987
    Date of Patent: January 3, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Takao Kawanabe, Morio Inoue, Mikio Hongo
  • Patent number: 4687939
    Abstract: An ion beam apparatus which comprises an enclosure defining a chamber of high vacuum. A crucible for producing vapor of a material, ionizing means, ion accelerating means, and a substrate to be deposited with the vaporized material to thereby form a film thereon are disposed within the chamber. An accelerating voltage is applied across the crucible and the accelerating means such that the crucible is of positive polarity while the accelerating means is of negative polarity. The material contained in the crucible is vaporized by heating. A pressure difference is maintained between the vapor pressure within the crucible and the vacuum chamber.
    Type: Grant
    Filed: November 6, 1984
    Date of Patent: August 18, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Tateoki Miyauchi, Hiroshi Yamaguchi, Mikio Hongo, Katsuro Mizukoshi, Akira Shimase, Ryohei Satoh
  • Patent number: 4609566
    Abstract: A photo-mask is mounted on a repairing chamber, with its mask pattern forming surface being exposed to the interior of the chamber. Vaporized repairing material which includes a metallic element is introduced into the chamber, and a laser beam is projected from the exterior of the chamber onto a transparent defect of the mask pattern. The irradiated portion is heated and the vaporized repairing material at the heated portion is resolved, resulting in the metal resolved from the repairing material deposits and fills the transparent defect. Thus, transparent defects of a mask pattern can be repaired in a simplified process.
    Type: Grant
    Filed: March 20, 1985
    Date of Patent: September 2, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Mikio Hongo, Katsurou Mizukoshi, Tateoki Miyauchi, Takao Kawanabe, Yasuhiro Koizumi
  • Patent number: 4609809
    Abstract: The invention discloses a method and apparatus for correcting a device characterized in that an ion beam is extracted from an ion source having high luminance such as a liquid metal ion source or the like, the ion beam is then converged to a delicate spot by use of a charged particle optical system and apertures, a wiring portion formed on and outside of an active layer region of a device and connected to the device is located to the spot by observing the wiring portion through an SIM, the ion beam in neutralized by an electron shower so as to prevent the wiring portion from being charged electrically, the converged ion beam spot is radiated to the wiring portion to remove the wiring portion, and radiation of the ion beam is stopped while observing the ion beam by a second ion mass spectrometer which detects that the wiring portion is cut by the ion beam and the ion beam reaches an insulating layer.
    Type: Grant
    Filed: March 16, 1984
    Date of Patent: September 2, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Yamaguchi, Akira Shimase, Tateoki Miyauchi, Mikio Hongo
  • Patent number: 4581628
    Abstract: The present invention consists in a semiconductor integrated circuit device characterized in that a circuit programming wiring layer is formed on an insulating film which is provided on a semiconductor substrate, and that a light shielding protective mask material is deposited around the circuit programming wiring layer except a program part thereof, through an insulating film.
    Type: Grant
    Filed: September 27, 1982
    Date of Patent: April 8, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Tateoki Miyauchi, Mikio Hongo, Masao Mitani, Isao Tanabe, Toshiaki Masuhara
  • Patent number: 4566765
    Abstract: A light source apparatus comprises one laser oscillator, at least one other laser oscillator, a light converter for converting a laser beam emitted from the other laser oscillator into a ring-shaped laser beam, and a reflecting mirror for passing a laser light beam emitted from the one laser oscillator through the center hole of the mirror and for reflecting the ring-shaped laser beam from the other laser oscillator via the light converter, the laser beam reflected by the reflecting mirror being coaxial with and being overlapped with the laser beam transmitted through the mirror from the one laser oscillator.
    Type: Grant
    Filed: October 13, 1983
    Date of Patent: January 28, 1986
    Assignee: Hitachi, Ltd.
    Inventors: Tateoki Miyauchi, Mikio Hongo, Katsuro Mizukoshi, Hiroshi Yamaguchi, Akira Shimase
  • Patent number: RE33193
    Abstract: Disclosed is an ion beam processing apparatus comprising within a vacuum container a specimen chamber with a table for mounting a specimen provided therein, a high intensity ion source, such as a liquid metal ion source or an electric field ionizing ion source which operates in ultra-low temperature, confronting the specimen chamber, an extraction electrode for extracting an ion beam out of the ion source, a charged-particle optical system for focusing the ion beam to a spot, and an aperture for adjusting the spot diameter.
    Type: Grant
    Filed: March 5, 1987
    Date of Patent: April 3, 1990
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Yamaguchi, Tateoki Miyauchi, Akira Shimase, Mikio Hongo