Patents by Inventor Mikio Kawakami
Mikio Kawakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10153520Abstract: A manufacturing method for an all-solid-state battery includes: producing a laminated battery having both end surfaces in a lamination direction and a side surface by laminating pluralities of collector layers, positive electrode mixture layers, solid electrolyte layers, and negative electrode mixture layers; supplying a liquid resin to only the side surface of the laminated battery; and curing the liquid resin. Producing the laminated battery by protruding at least one layer of the collector layer, the positive electrode mixture layer, the solid electrolyte layer, and the negative electrode mixture layer relative to remaining of the layers to form a protruding layer. Protruding a plurality of protruding layers from the side surface of the battery. Supplying the resin involves supplying the liquid resin to only the side surface of the laminated battery such that the liquid resin penetrates into a clearance between one protruding layer and another protruding layer.Type: GrantFiled: May 26, 2017Date of Patent: December 11, 2018Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yoshihiro Iwano, Akira Tsujiko, Fuhito Kamata, Tomonori Kawamura, Mikio Kawakami
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Publication number: 20170352923Abstract: A manufacturing method for an all-solid-state battery includes: producing a laminated battery having both end surfaces in a lamination direction and a side surface by laminating pluralities of collector layers, positive electrode mixture layers, solid electrolyte layers, and negative electrode mixture layers; supplying a liquid resin to only the side surface of the laminated battery; and curing the liquid resin. Producing the laminated battery by protruding at least one layer of the collector layer, the positive electrode mixture layer, the solid electrolyte layer, and the negative electrode mixture layer relative to remaining of the layers to form a protruding layer. Protruding a plurality of protruding layers from the side surface of the battery. Supplying the resin involves supplying the liquid resin to only the side surface of the laminated battery such that the liquid resin penetrates into a clearance between one protruding layer and another protruding layer.Type: ApplicationFiled: May 26, 2017Publication date: December 7, 2017Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Yoshihiro IWANO, Akira TSUJIKO, Fuhito KAMATA, Tomonori KAWAMURA, Mikio KAWAKAMI
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Patent number: 9673166Abstract: A three-dimensional mounting method for successively laminating N number of upper-layer joining materials includes positioning a first upper-layer joining material relative to a lowermost-layer joining material by recognizing an alignment position of the lowermost-layer joining material and a lower face alignment position of the first upper-layer joining material by a two-field image recognition unit, storing positional coordinates of the alignment position of the lowermost-layer joining material, positioning an (n+1)-th upper-layer joining material relative to an n-th upper-layer joining material by recognizing an upper face alignment position of the n-th upper-layer joining material and a lower face alignment position of the (n+1)-th upper-layer joining material, storing positional coordinates of the upper face alignment position of the n-th upper-layer joining material, recognizing an upper face alignment position of the N-th uppermost-layer joining material, and storing positional coordinates of the upperType: GrantFiled: November 19, 2014Date of Patent: June 6, 2017Assignee: TORAY ENGINEERING CO., LTD.Inventors: Koji Nishimura, Katsumi Terada, Mikio Kawakami
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Publication number: 20170005068Abstract: A three-dimensional mounting method for successively laminating N number of upper-layer joining materials includes positioning a first upper-layer joining material relative to a lowermost-layer joining material by recognizing an alignment position of the lowermost-layer joining material and a lower face alignment position of the first upper-layer joining material by a two-field image recognition unit, storing positional coordinates of the alignment position of the lowermost-layer joining material, positioning an (n+1)-th upper-layer joining material relative to an n-th upper-layer joining material by recognizing an upper face alignment position of the n-th upper-layer joining material and a lower face alignment position of the (n+1)-th upper-layer joining material, storing positional coordinates of the upper face alignment position of the n-th upper-layer joining material, recognizing an upper face alignment position of the N-th uppermost-layer joining material, and storing positional coordinates of the upperType: ApplicationFiled: November 19, 2014Publication date: January 5, 2017Inventors: Koji NISHIMURA, Katsumi TERADA, Mikio KAWAKAMI
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Patent number: 7918953Abstract: Positioning recognition marks are read by movable recognition device for positioning objects to be bonded to each other. An alignment method includes a step of reading the recognition marks during movement of the recognition device before its complete stop, and a step of identifying absolute positions of the recognition marks by correcting the mark recognition positions having been read based on a position feedback signal of the moving recognition device. A mounting method using the alignment method is also disclosed. It is possible to maintain a high alignment accuracy, eliminate necessity of assuring a settling time for complete stop of the movable recognition device, and significantly reduce the alignment time and mounting tact.Type: GrantFiled: November 6, 2007Date of Patent: April 5, 2011Assignee: Toray Engineering Co., Ltd.Inventors: Akira Yamauchi, Mikio Kawakami
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Publication number: 20090289098Abstract: A chip mounting apparatus is provided with a drive control means. The drive control means is provided with a tool holder whereupon a tool for applying pressure to a chip is mounted, a holder supporting means for supporting the tool holder to be vertically moved, a drive means for vertically moving the holder supporting means, and a position detecting means for detecting a relative position of the tool holder to the holder supporting means. The drive control means controls the height and the pressurizing force of the tool, based on the position of the tool holder when the tool and the chip are one over another and brought into contact with a substrate. A chip mounting method is also provided. Short-circuit failures between adjacent solder bumps can be prevented and chips can be mounted with high yield and reliability.Type: ApplicationFiled: November 30, 2006Publication date: November 26, 2009Inventors: Katsumi Terada, Mikio Kawakami
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Publication number: 20080073027Abstract: Positioning recognition marks are read by movable recognition device for positioning objects to be bonded to each other. An alignment method includes a step of reading the recognition marks during movement of the recognition device before its complete stop, and a step of identifying absolute positions of the recognition marks by correcting the mark recognition positions having been read based on a position feedback signal of the moving recognition device. A mounting method using the alignment method is also disclosed. It is possible to maintain a high alignment accuracy, eliminate necessity of assuring a settling time for complete stop of the movable recognition device, and significantly reduce the alignment time and mounting tact.Type: ApplicationFiled: November 6, 2007Publication date: March 27, 2008Inventors: Akira Yamauchi, Mikio Kawakami
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Patent number: 7299545Abstract: Positioning recognition marks are read by movable recognition device for positioning objects to be bonded to each other. An alignment method includes a step of reading the recognition marks during movement of the recognition device before its complete stop, and a step of identifying absolute positions of the recognition marks by correcting the mark recognition positions having been read based on a position feedback signal of the moving recognition device. A mounting method using the alignment method is also disclosed. It is possible to maintain a high alignment accuracy, eliminate necessity of assuring a settling time for complete stop of the movable recognition device, and significantly reduce the alignment time and mounting tact.Type: GrantFiled: March 27, 2003Date of Patent: November 27, 2007Assignee: Toray Engineering Co., Ltd.Inventors: Akira Yamauchi, Mikio Kawakami
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Publication number: 20050274869Abstract: Positioning recognition marks (A, B, C, D) are read by movable recognition means (5) for positioning objects (2, 4) to be bonded to each other. An alignment method includes a step of reading the recognition marks (A, B, C, D) during movement of the recognition means (5) before its complete stop, and a step of identifying absolute positions of the recognition marks (A, B, C, D) by correcting the mark recognition positions having been read based on a position feedback signal of the moving recognition means (5). A mounting method using the alignment method is also disclosed. It is possible to maintain a high alignment accuracy, eliminate necessity of assuring a settling time for complete stop of the movable recognition means (5), and significantly reduce the alignment time and mounting tact.Type: ApplicationFiled: March 27, 2003Publication date: December 15, 2005Applicant: Toray Engineering Co., Ltd.Inventors: Akira Yamauchi, Mikio Kawakami
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Publication number: 20030106210Abstract: A chip-mounting device comprises a chip-holding tool and a substrate-holding stage. At least one of the chip-holding tool and the substrate-holding stage is placed on a coarse adjustment table for coarse positioning of a chip or a substrate. Brake means for fixing the positioned coarse adjustment table is provided on the coarse adjustment table. Fine adjustment means for fine positioning of a chip or a substrate is provided on the coarse adjustment table. The chip-mounting device allows alignment with submicorn accuracy to be performed quickly, shortening tact time in chip mounting remarkably.Type: ApplicationFiled: November 12, 2002Publication date: June 12, 2003Inventors: Yoshiyuki Arai, Akira Yamauchi, Mikio Kawakami