Patents by Inventor Mikio Mohri

Mikio Mohri has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6858886
    Abstract: A photodiode (111) and resistors (121) are formed on a semi-insulating InP substrate (101). The photodiode (111) is formed by subjecting a layered structure formed by successively depositing an n+-type InP cladding layer (102), an n-type InGaAsP core layer (103), a nondoped InGaAs active layer (104), a p-type InGaAsP core layer (105), and a p+-type InP cladding layer 106 on the InP substrate (101) to a selective etching process. The resistors (121) have the same layered structure as the photodiode (111). Photodiode (111) is connected to n-type wiring lines (131) and a p-type wiring line (141). Resistors (121) are connected to the n-type wiring lines (131) and the p-type wiring line (141) in parallel to the photodiode (111). A side surface on the side of the photodiode (111) of the InP substrate (101) is a cleavage plane, and the cleavage plane is coated with an antireflection film (161).
    Type: Grant
    Filed: April 11, 2003
    Date of Patent: February 22, 2005
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Hiroaki Kakinuma, Mikio Mohri
  • Publication number: 20030197172
    Abstract: A photodiode (111) and resistors (121) are formed on a semi-insulating InP substrate (101). The photodiode (111) is formed by subjecting a layered structure formed by successively depositing an n+-type InP cladding layer (102), an n-type InGaAsP core layer (103), a nondoped InGaAs active layer (104), a p-type InGaAsP core layer (105), and a p+-type InP cladding layer 106 on the InP substrate (101) to a selective etching process. The resistors (121) have the same layered structure as the photodiode (111). Photodiode (111) is connected to n-type wiring lines (131) and a p-type wiring line (141). Resistors (121) are connected to the n-type wiring lines (131) and the p-type wiring line (141) in parallel to the photodiode (111). A side surface on the side of the photodiode (111) of the InP substrate (101) is a cleavage plane, and the cleavage plane is coated with an antireflection film (161).
    Type: Application
    Filed: April 11, 2003
    Publication date: October 23, 2003
    Inventors: Hiroaki Kakinuma, Mikio Mohri
  • Publication number: 20020185641
    Abstract: A compound semiconductor device comprising: an semi-insulated InP substrate; a plurality of interconnections formed on the semi-insulated InP substrate; and an insulating film formed between the interconnections, the insulating film being a silicon oxide.
    Type: Application
    Filed: May 14, 2002
    Publication date: December 12, 2002
    Inventor: Mikio Mohri