Patents by Inventor Mikio Nishihara

Mikio Nishihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6485814
    Abstract: To provide electrical conduction between front and back surfaces of a thin film multi-layered circuit board, such as an MCM, at low cost without using a simultaneous firing process for ceramic. The thin film multi-layered circuit board has at least one thin film circuit layer on a first surface of a substrate, wherein a conductor layer is disposed in the lowermost layer of the thin film circuit layer in contact with the first surface of the substrate, and is characterized in that holes for providing the electrical conduction between front and back surfaces of the substrate are formed through the substrate from the first surface to a second surface thereof so that the conductor layer is exposed in the hole, wherein the diameter of the hole is gradually enlarged from the first surface to the second surface.
    Type: Grant
    Filed: February 25, 2000
    Date of Patent: November 26, 2002
    Assignee: Fujitsu Limited
    Inventors: Kiyokazu Moriizumi, Mikio Nishihara
  • Patent number: 5496971
    Abstract: In a circuit arrangement for a multilayer printed circuit board, a first circuit layer is formed on a substrate, and comprises a dielectric layer having a circuit pattern formed thereon. A second circuit layer is further formed on the first circuit layer, and comprises a dielectric layer having a circuit pattern formed thereon. The first circuit pattern includes conductive segments having only an X-directional component, and the second circuit pattern includes conductive segments having only an Y-directional component perpendicular to the X-directional component. Electric connections between the X-directional segments and the Y-directional segments are suitably established by vias provided in the second layer.
    Type: Grant
    Filed: August 29, 1994
    Date of Patent: March 5, 1996
    Assignee: Fujitsu Limited
    Inventors: Kiyokazu Moriizumi, Mikio Nishihara
  • Patent number: 5475922
    Abstract: A contact pin includes: a pin terminal secured to a stationary base art by press-fitting a press-fitted part into the stationary base part, the pin terminal projecting from the stationary base part and being joined to the board; a contact part inserted into a contact pin through-hole of a movable lock part so that a plug pin terminal is fitted into the contact part; and an auxiliary plate 6 reinforcing the press-fitted part, engaged with the movable lock part and transmitting a force caused by a movement of the movable lock part to the press-fitted part. A connector constructed in the described manner includes a plurality of above-mentioned contact pins.
    Type: Grant
    Filed: September 15, 1994
    Date of Patent: December 19, 1995
    Assignee: Fujitsu Ltd.
    Inventors: Akira Tamura, Hidehisa Sakai, Mikio Nishihara, Kyoichiro Kawano
  • Patent number: 5354209
    Abstract: A contact pin includes: a pin terminal secured to a stationary base art by press-fitting a press-fitted part into the stationary base part, the pin terminal projecting from the stationary base part and being joined to the board; a contact part inserted into a contact pin through-hole of a movable lock part so that a plug pin terminal is fitted into the contact part; and an auxiliary plate 6 reinforcing the press-fitted part, engaged with the movable lock part and transmitting a force caused by a movement of the movable lock part to the press-fitted part. A connector constructed in the described manner includes a plurality of above-mentioned contact pins.
    Type: Grant
    Filed: July 29, 1993
    Date of Patent: October 11, 1994
    Assignee: Fujitsu Limited
    Inventors: Akira Tamura, Hidehisa Sakai, Mikio Nishihara, Kyoichiro Kawano
  • Patent number: 5181317
    Abstract: A method of making an engineering change to a printed wiring board changes connection for a terminal of an electronic component which is mounted on the printed wiring board through a terminal pad. The terminal is electrically connected to a destination through the terminal pad and wiring within the printed wiring board. The present invention places an insulator, including an insulating material and a conductive layer formed thereon, between the terminal and the terminal pad. The electronic component is mounted on the printed wiring board and the terminal is electrically connected to the conductive layer. A discrete wire is placed between the conductive layer and the destination.
    Type: Grant
    Filed: September 27, 1991
    Date of Patent: January 26, 1993
    Assignee: Fujitsu Limited
    Inventors: Mikio Nishihara, Teruo Murase, Kiyotaka Seyama, Kiyoshi Kuwabara, Osamu Ohshima
  • Patent number: 4785141
    Abstract: A wiring structure for a termination circuit in which a termination circuit is connected to an integrated circuit through a fixed wiring pattern provided in a leadout layer closest to the mounting surface.
    Type: Grant
    Filed: November 18, 1987
    Date of Patent: November 15, 1988
    Assignee: Fujitsu Limited
    Inventors: Mikio Nishihara, Kiyoshi Kuwabara
  • Patent number: 4692843
    Abstract: A multilayer printed wiring board having an air gap between neighboring printed wiring boards of the multilayer printed wiring board by inserting plated spacers to both end faces of through-hole pads which are provided to each printed wiring board so that each through-hole pad opposes to another through-hole pad on the neighboring printed wiring board. The spacers opposed to each other are joined together by solder, and each spacer has an end surface having a size being smaller than a size of the end surface of each through-hole pad to provide a drop part at the joint part of the spacers, so that melted solder stays at the drop part not flowing toward the board through the side surface of the through-hole pad when the printed wiring boards are integrated to the multilayer printed wiring board under pressure and high temperature.
    Type: Grant
    Filed: November 13, 1986
    Date of Patent: September 8, 1987
    Assignee: Fujitsu Limited
    Inventors: Masaru Matsumoto, Mikio Nishihara, Kiyoshi Kuwabara
  • Patent number: 4675789
    Abstract: A high density multilayer printed circuit board comprising generally parallel signal layers, electric source layers, and ground layers, with insulating layers arranged between the signal layers and the electric source layers, between the electric source layers and the ground layers, and between the ground layers and the signal layers respectively. Conductor portions are formed in through holes which are opened in a direction transverse to the signal layers, electric source layers, and ground layers. The conductor portions are electrically connected to the signal layers and/or the electric source layers, and/or the ground layers, through the lands thereof, the connections of the lands being substantially equally distributed among the conductor portions.
    Type: Grant
    Filed: December 20, 1985
    Date of Patent: June 23, 1987
    Assignee: Fujitsu Limited
    Inventors: Kiyoshi Kuwabara, Mikio Nishihara, Kazuhisa Tsunoi
  • Patent number: 4298770
    Abstract: A printed board comprising a plurality of through holes formed therein and located on intersecting points of an X-Y orthogonal basic grid, and an oblique conductor pattern, wherein conductors are formed along channels arranged in accordance with a principle that one conductor passes between adjacent grid points arranged in the X direction, while two or more conductors pass between adjacent grid points arranged in the Y direction, and each conductor obliquely extends in a zigzag line without contacting the grid points. Such conductor pattern ensures a high density and minimum length of wiring.
    Type: Grant
    Filed: August 24, 1979
    Date of Patent: November 3, 1981
    Assignee: Fujitsu Limited
    Inventors: Mikio Nishihara, Masahiro Oda, Takamitsu Tsuchimoto
  • Patent number: 4159508
    Abstract: This application discloses a multilayer printed wiring board having a plurality of pattern layers. Said printed wiring board has at least one pair of plated through holes, i.e. a first and a second plated through hole. The first plated through hole is directly connected to said patterns. The second plated through hole is not directly connected to said patterns. An electronic element terminal is connected to said second plated through hole. The first and second plated through holes are electrically connected to each other on a surface opposite an element mounting surface of the printed wiring board.
    Type: Grant
    Filed: December 15, 1976
    Date of Patent: June 26, 1979
    Assignee: Fujitsu Limited
    Inventors: Masahiro Oda, Mikio Nishihara
  • Patent number: 4150421
    Abstract: A multi-layer printed circuit board has a through hole extending therein outside the mounting portion of a component mounted on the surface layer of the board. The component has a lead pad on the surface layer of a first printed circuit board and a modification pad on the surface layer between the through hole and the lead pad. The through hole extends through the first board to inside the mounting portion via a pattern of an internal wiring layer of the board. A second printed circuit board is joined to the first board at the internal layers of each to form a unitary integrated circuit board. Another through hole extends through the first and second boards inside the mounting portion of the integrated printed circuit board. The pattern and a selected wiring layer of the second board are thereby connected via the other through hole. Additional through holes extend through the second board and interconnect the layers of the second board.
    Type: Grant
    Filed: April 17, 1978
    Date of Patent: April 17, 1979
    Assignee: Fujitsu Limited
    Inventors: Mikio Nishihara, Kyoichiro Kawano