Patents by Inventor Mikio Yonekura

Mikio Yonekura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5006728
    Abstract: The power supply circuit supplies electric current to a plurality of circuits in turn. The power supply circuit has a power source (5); a resistor (4); one end of which is connected to the power source (5); a first current path (1), one end of which is connected to the other end of the resistor (4), and including a first driver circuit (12); a second current path (2), one end of which is connected to the other end of the resistor (4), and including a second driver circuit (22); and a controller (3) which drives the first and second driver circuits (12, 22) alternatively. The controller (3) controls the on-and-off timings of the first and second driver circuits (12, 22) so that the first current path (12) is maintained in the ON state for a time equal to or more than a predetermined necessary time, and the second current path (22) is broken for a time equal to or less than an allowed time.
    Type: Grant
    Filed: April 23, 1990
    Date of Patent: April 9, 1991
    Assignee: Fanuc Ltd.
    Inventors: Mikio Yonekura, Hiroyuki Tojo
  • Patent number: 4992976
    Abstract: A method is provided of allocating board slot numbers in a control system composed of a plurality of boards which are subject to a variation in number and type. Slot numbers (12), in a maximum system (10) are determined to prepare software, and module identification numbers (13-18) of the boards at respective slots in a particular system (20) are read out. The read-out modules are converted to slot numbers (22) in the maximum system (10). Software in the maximum system can thus be executed without alteration.
    Type: Grant
    Filed: March 23, 1990
    Date of Patent: February 12, 1991
    Assignee: Fanuc Ltd
    Inventors: Mikio Yonekura, Jiro Kinoshita
  • Patent number: 4964140
    Abstract: A digital differential signal transmission apparatus is provided in a transmission line connecting a device (3) requiring an explosion-proof structure with a differential driver (101) or differential receiver (102). A shunt diode-type safety device (16) is inserted in order to realize an essential safe explosion-proof structure. High impedance transmission lines, which transmit and receive a single end signal, are employed as the transmission lines. Another shunt diode-type safety device (408) is inserted in a power supply line (143) connected to transmitting equipment (405, 406) on the side of the abovementioned device.
    Type: Grant
    Filed: February 7, 1989
    Date of Patent: October 16, 1990
    Assignee: Fanuc Ltd.
    Inventor: Mikio Yonekura
  • Patent number: 4959775
    Abstract: A bus regulating system has a bus shared by a plurality of modules (10, 20, 30) and a bus usage permit signal line (4) in the form of a daisy chain. The usage of the bus is flexibly controlled according to the tasks of the modules (10, 20, 30). Each of the modules (10, 20, 30) has in its bus control circuit (12, 22, 32) overlapping request determining circuit and continued use determining circuit. The overlapping request determining circuit issues an overlapping request signal even if a request signal is issued from another module when a higher level task is being processed. The overlapping request determining circuit does not issue a request signal if a request signal is issued from another module when a lower level task is being processed. The continued use determining means continuously keeps the right to use the bus when a higher level task is being processed, and abandons the right to use the bus after the bus has been used when a lower level task is being processed.
    Type: Grant
    Filed: December 22, 1987
    Date of Patent: September 25, 1990
    Assignee: Fanuc Ltd.
    Inventor: Mikio Yonekura
  • Patent number: 4930070
    Abstract: An interrupt control method is provided for a multiprocessor system in which a plurality of processors (21, 31, 41) and an interface circuit (10) for causing interrupts are connected to a bus. According to the method, a particular address space (Addr1, Addr2, Addr3) is used as an interrupt address, and a mask bit corresponding to the address space is selected in each processor. The mask bit is stored in a register (24, 34, 44) in the processor. A bus cycle generator circuit in the interface circuit (10) is allowed to occupy the bus in response to an interrupt signal, and a bit indicative of a cause of an interrupt and corresponding to the address space is written into an address bus. The processor (21, 31, 41) recognizes an interrupt from the address bus bit corresponding to the address space (Addr1, Addr2, Addr3) and the mask bit stored in the register (24, 34, 44).
    Type: Grant
    Filed: November 25, 1987
    Date of Patent: May 29, 1990
    Assignee: Fanuc Ltd.
    Inventors: Mikio Yonekura, Jiro Kinoshita
  • Patent number: 4635183
    Abstract: A controller, such as a numerical controller, displays the change with time of input/output statuses or an internal status by a timing chart, to facilitate analysis of the cause of interference concerning signal timing. The controller has a status display unit (22) which includes: a keyboard (25) for inputting desired display data, display data input times, and display data input-inhibit conditions; a timer (26) which generates a clock signal at predetermined timing; a memory (27) which inputs desired display data during an interval of a desired input time in accordance with the conditions set through the keyboard; a display (28) which displays the data input to the memory when the input-inhibit conditions are satisfied; and a processor (29) which controls the memory and the display in synchronism with the clock signal.
    Type: Grant
    Filed: July 12, 1984
    Date of Patent: January 6, 1987
    Assignee: Fanuc Limited
    Inventors: Shinichi Isobe, Mikio Yonekura
  • Patent number: 4510570
    Abstract: A central system for operating presses utilizing one or plural microcomputers is disclosed in which the rotational angle of, for example, the crankshaft of the press is monitored and used to initiate the operation of programmed movements of the press. When utilizing plural microcomputers, they are operated synchronously, a pulse is developed in accordance with the outputs of each, and this pulse is utilized to control the press.
    Type: Grant
    Filed: August 9, 1982
    Date of Patent: April 9, 1985
    Assignee: Amada Company Limited
    Inventor: Mikio Yonekura
  • Patent number: 4347609
    Abstract: A method and system for transmitting N-bit serial data (where N is a positive number) in the form of a bit serial, including a data sending circuit, a data receiving circuit and data transmission lines. The system includes a first data transmission line; a second transmission line; a transfer circuit, provided in the receiving means, for sending back to the data sending circuit through the second data transmission line, the bit content of received N-bit data each time one bit of the N-bit data is received through the first data transmission line; a comparison circuit, provided in the data sending circuit, for comparing the transmitted bit content and the bit content sent back on the second data transmission line; and a detection circuit provided in the data receiving circuit. The data sending circuit is adapted to transmit as a start bit a signal of a prescribed logical value before the N-bit serial data is sent, and, as an alarm bit, the results of the comparison after the N-bit serial data has been sent.
    Type: Grant
    Filed: August 20, 1980
    Date of Patent: August 31, 1982
    Assignee: Fujitsu Fanuc Limited
    Inventors: Hiroomi Fukuyama, Shinichi Isobe, Mikio Yonekura, Minoru Kataoka
  • Patent number: 4152978
    Abstract: This disclosure relates to a method and apparatus for changing dies in a press and for storing dies not in use in a storage rack associated with the press. The press includes a work table disposed beneath the ram of the press and having means for moving dies from a "waiting position" at the left of the ram to a "working position" beneath the ram and then to a "retiring position" to the right of the ram. A die returning conveyor returns dies from the "retiring position" to a die transferring carriage disposed behind the ram from where they are automatically transferred to an adjacent storage rack. When a particular die is desired, it is automatically removed from the storage rack by the die transferring carriage, and then conveyed to the "waiting position" by means of a die advancing conveyor.
    Type: Grant
    Filed: August 31, 1977
    Date of Patent: May 8, 1979
    Assignee: Amada Company, Ltd.
    Inventors: Haruhisa Abe, Mikio Yonekura
  • Patent number: 4144783
    Abstract: A method and apparatus for blanking wide sheet materials into a plurality of pieces of predetermined shapes are disclosed. The apparatus comprises a blanking die press and first and second carriages movable in a predetermined, numerically controlled and programmable sequence along Y and X axes, respectively, relative to the blanking die press. The blanking die includes upper and lower die holders which are adapted to be automatically rotated approximately 180.degree. to reverse the die orientation and thereby more economically blank the sheet material with a minimum of wastage.
    Type: Grant
    Filed: March 15, 1977
    Date of Patent: March 20, 1979
    Assignee: Amada Company, Limited
    Inventors: Kazuya Yamazaki, Mikio Yonekura