Patents by Inventor Mikitaka Ito

Mikitaka Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220236482
    Abstract: There is provided an optical waveguide chip. In the optical waveguide chip, an optical waveguide circuit includes a substrate, a lower clad layer laminated on the substrate, a core layer that is laminated on the lower clad layer and corresponds to a propagation path of an optical signal, and an upper clad layer laminated on the core layer; the upper and lower clad layers in a region that does not correspond to the propagation path of the optical signal are removed across to an edge of the chip; the region from which the upper and lower clad layers have been removed is filled with a light absorbing material; and a height of the filled light absorbing material is higher than a height of an uppermost surface of the upper clad layer.
    Type: Application
    Filed: June 3, 2019
    Publication date: July 28, 2022
    Inventors: Satomi Katayose, Nobutatsu Koshobu, Katsuhiko Hirabayashi, Ryoichi Kasahara, Mikitaka Ito
  • Patent number: 7995876
    Abstract: Two AWG circuits are integrated while preventing degradation in quality of a multiplexing/demultiplexing function. An arrayed waveguide grating circuit includes: a first slab waveguide (52) connected to a first input waveguide (51a) and second output waveguides (55b); a second slab waveguide (54) connected to first output waveguides (55a) and a second input waveguide (51b); and an array waveguide (53) connecting the first slab waveguide (52) and the second slab waveguide (54), wherein the input waveguides (51a, 51b) are connected to the slab waveguides (52, 54) at an interval of 1.5× from the outermost second output waveguide out of the second output waveguides (55a, 55b) connected at an interval x depending on a wavelength.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: August 9, 2011
    Assignees: Nippon Telegraph and Telephone Corporation, NTT Electronics Corporation
    Inventors: Tomoyuki Yamada, Mitsuru Nagano, Mikitaka Ito, Toshio Watanabe, Takayuki Mizuno, Takashi Goh, Akimasa Kaneko
  • Publication number: 20090263084
    Abstract: Two AWG circuits are integrated while preventing degradation in quality of a multiplexing/demultiplexing function. An arrayed waveguide grating circuit includes: a first slab waveguide (52) connected to a first input waveguide (51a) and second output waveguides (55b); a second slab waveguide (54) connected to first output waveguides (55a) and a second input waveguide (51b); and an array waveguide (53) connecting the first slab waveguide (52) and the second slab waveguide (54), wherein the input waveguides (51a, 51b) are connected to the slab waveguides (52, 54) at an interval of 1.5× from the outermost second output waveguide out of the second output waveguides (55a, 55b) connected at an interval x depending on a wavelength.
    Type: Application
    Filed: December 21, 2006
    Publication date: October 22, 2009
    Applicants: Nppon Telegraph and Telephone Corporation, NTT Electronics Corportion
    Inventors: Tomoyuki Yamada, Mitsuru Nagano, Mikitaka Ito, Toshio Watanabe, Takayuki Mizuno, Takashi Goh, Akimasa Kaneko
  • Patent number: 7400800
    Abstract: An arrayed waveguide grating type optical multiplexer/demultiplexer circuit in which wavelength dispersion is reduced. An input wave guide (1), a first slab waveguide (2), an arrayed waveguide (3), a second slab waveguide (4) and an output waveguide (5) are connected sequentially. Furthermore, a parabola waveguide (6) is provided between the input waveguide (1) and the first slab waveguide (2), and a taper waveguide (7) is provided between the second slab waveguide (4) and the output waveguide (5). A parabola waveguide length Z0 exists in a range Za,0=Z0=Zp,0 determined by a parabola waveguide length Za,0 where the ratio of absolute amplitude between the main peak and the first side peak in the field distribution of far-field of the parabola waveguide (6) has an upper limit of 0.217, and a parabola waveguide length Zp,0 where the relative phase of the main peak and the first side peak in the field distribution of far-field has a lower limit of 3.14 radian.
    Type: Grant
    Filed: December 26, 2003
    Date of Patent: July 15, 2008
    Assignees: NTT Electronics Corporation, Nippon Telegraph & Telephone Corporation
    Inventors: Tsutomu Kitoh, Yasuyuki Inoue, Mikitaka Ito, Yoshinori Hibino, Akimasa Kaneko
  • Publication number: 20060233491
    Abstract: An arrayed waveguide grating type optical multiplexer/demultiplexer circuit in which wavelength dispersion is reduced. An input wave guide (1), a first slab waveguide (2), an arrayed waveguide (3), a second slab waveguide (4) and an output waveguide (5) are connected sequentially. Furthermore, a parabola waveguide (6)is provided between the input waveguide (1) and the first slab waveguide (2), and a taper waveguide (7) is provided between the second slab waveguide (4) and the output waveguide (5). A parabola waveguide length Z0 exists in a range Za,0=Z0=Zp,0 determined by a parabola waveguide length Za,0 where the ratio of absolute amplitude between the main peak and the first side peak in the field distribution of far-field of the parabola waveguide (6) has an upper limit of 0.217, and a parabola waveguide length Zp,0 where the relative phase of the main peak and the first side peak in the field distribution of far-field has a lower limit of 3.14 radian.
    Type: Application
    Filed: December 26, 2003
    Publication date: October 19, 2006
    Inventors: Tsutomu Kitoh, Yasuyuki Inoue, Mikitaka Ito